Temperature Sensor with Serial Presence-Detect EEPROM
Thermal Sensor Operations
The temperature from the integrated thermal sensor is monitored and converts into a
digital word via the I
2
C bus. System designers can use the user-programmable registers
to create a custom temperature-sensing solution based on system requirements. Pro-
gramming and configuration details comply with JEDEC standard No. 21-C page 4.7-1,
"Definition of the TSE2002av, Serial Presence Detect with Temperature Sensor."
Serial Presence-Detect EEPROM Operation
DDR3 SDRAM modules incorporate serial presence-detect. The SPD data is stored in a
256-byte EEPROM. The first 128 bytes are programmed by Micron to comply with JE-
DEC standard JC-45, "Appendix X: Serial Presence Detect (SPD) for DDR3 SDRAM Mod-
ules." These bytes identify module-specific timing parameters, configuration informa-
tion, and physical attributes. The remaining 128 bytes of storage are available for use by
the customer. System READ/WRITE operations between the master (system logic) and
the slave EEPROM device occur via a standard I
2
C bus using the DIMM’s SCL (clock)
SDA (data), and SA (address) pins. Write protect (WP) is connected to V
SS
, permanently
disabling hardware write protection. For further information refer to Micron technical
note TN-04-42, "Memory Module Serial Presence-Detect."
2GB, 4GB (x72, ECC, SR) 240-Pin DDR3 RDIMM
Temperature Sensor with Serial Presence-Detect EEPROM
PDF: 09005aef8394fb39
jsf18c256_512x72pz.pdf - Rev. I 4/13 EN
10
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2009 Micron Technology, Inc. All rights reserved.
Electrical Specifications
Stresses greater than those listed may cause permanent damage to the module. This is a
stress rating only, and functional operation of the module at these or any other condi-
tions outside those indicated in each device's data sheet is not implied. Exposure to ab-
solute maximum rating conditions for extended periods may adversely affect reliability.
Table 8: Absolute Maximum Ratings
Symbol Parameter Min Max Units
V
DD
V
DD
supply voltage relative to V
SS
–0.4 1.975 V
V
IN
, V
OUT
Voltage on any pin relative to V
SS
–0.4 1.975 V
Table 9: Operating Conditions
Symbol Parameter Min Nom Max Units Notes
V
DD
V
DD
supply voltage 1.425 1.5 1.575 V
I
VTT
Termination reference current from
V
TT
–600 600 mA
V
TT
Termination reference voltage (DC) –
command/address bus
0.49 × V
DD
- 20mV 0.5 × V
DD
0.51 × V
DD
+ 20mV V 1
I
I
Input leakage current;
Any input 0V V
IN
V
DD
; V
REF
input 0V V
IN
0.95V (All other pins
not under test = 0V)
Address in-
puts, RAS#,
CAS#, WE#,
S#, CKE, ODT,
BA, CK, CK#
µA 5
I
OZ
Output leakage current;
0V V
OUT
V
DD
; DQ
and ODT are disabled;
ODT is HIGH
DQ, DQS,
DQS#
–5 0 5 µA
I
VREF
V
REF
supply leakage current;
V
REFDQ
= V
DD
/2 or V
REFCA
= V
DD
/2
(All other pins not under test = 0V)
–18 0 18 µA
T
A
Module ambient
operating temperature
Commercial 0 70 °C 2, 3
T
C
DDR3 SDRAM compo-
nent case operating
temperature
Commercial 0 95 °C 2, 3, 4
Notes:
1. V
TT
termination voltage in excess of the stated limit will adversely affect the command
and address signals’ voltage margin and will reduce timing margins.
2. T
A
and T
C
are simultaneous requirements.
3. For further information, refer to technical note TN-00-08: “Thermal Applications,”
available on Micron’s Web site.
4. The refresh rate is required to double when 85°C < T
C
95°C.
5. Inputs are terminated to V
DD
/2. Input current is dependent on terminating resistance se-
lected in register.
2GB, 4GB (x72, ECC, SR) 240-Pin DDR3 RDIMM
Electrical Specifications
PDF: 09005aef8394fb39
jsf18c256_512x72pz.pdf - Rev. I 4/13 EN
11
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2009 Micron Technology, Inc. All rights reserved.
DRAM Operating Conditions
Recommended AC operating conditions are given in the DDR3 component data sheets.
Component specifications are available on Micron’s web site. Module speed grades cor-
relate with component speed grades, as shown below.
Table 10: Module and Component Speed Grades
DDR3 components may exceed the listed module speed grades; module may not be available in all listed speed grades
Module Speed Grade Component Speed Grade
-2G1 -093
-1G9 -107
-1G6 -125
-1G4 -15E
-1G1 -187E
-1G0 -187
-80C -25E
-80B -25
Design Considerations
Simulations
Micron memory modules are designed to optimize signal integrity through carefully de-
signed terminations, controlled board impedances, routing topologies, trace length
matching, and decoupling. However, good signal integrity starts at the system level.
Micron encourages designers to simulate the signal characteristics of the system's
memory bus to ensure adequate signal integrity of the entire memory system.
Power
Operating voltages are specified at the DRAM, not at the edge connector of the module.
Designers must account for any system voltage drops at anticipated power levels to en-
sure the required supply voltage is maintained.
2GB, 4GB (x72, ECC, SR) 240-Pin DDR3 RDIMM
DRAM Operating Conditions
PDF: 09005aef8394fb39
jsf18c256_512x72pz.pdf - Rev. I 4/13 EN
12
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2009 Micron Technology, Inc. All rights reserved.

MT18JSF51272PZ-1G6K1

Mfr. #:
Manufacturer:
Micron
Description:
MODULE DDR3 SDRAM 4GB 240RDIMM
Lifecycle:
New from this manufacturer.
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