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AT27LV256A-15RI

P1-P3P4-P6P7-P9P10-P12
AT27LV256A
7
Programming Waveforms
(1)
Notes: 1. The Input Timing Reference is 0.8V for V
IL
and 2.0V for V
IH
.
2. t
OE
and t
DFP
are characteristics of the device but must be accommodated by the programmer.
3. When programming the AT27LV256A a 0.1 µF capacitor is required across V
PP
and ground to suppress spurious voltage
transients.
DC Programming Characteristics
TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, V
PP
= 13.0 ± 0.25V
Symbol Parameter Test Conditions
Limits
UnitsMin Max
I
LI
Input Load Current V
IN
= V
IL
, V
IH
±10 µA
V
IL
Input Low Level -0.6 0.8 V
V
IH
Input High Level 2.0 V
CC
+ 0.5 V
V
OL
Output Low Voltage I
OL
= 2.1 mA 0.4 V
V
OH
Output High Voltage I
OH
= -400 =µA2.4 V
I
CC2
V
CC
Supply Current (Program and Verify) 25 mA
I
PP2
V
PP
Current CE = V
IL
25 mA
V
ID
A9 Product Identification Voltage 11.5 12.5 V
AT27LV256A
8
Notes: 1. V
CC
must be applied simultaneously or before V
PP
and removed simultaneously or after V
PP
.
2. This parameter is only sampled and is not 100% tested. Output Float is defined as the point where data is no longer driven—
see timing diagram.
3. Program Pulse width tolerance is 100
∫µsec=±=5%.
Note: 1. The AT27LV256A has the same Product Identification Code as the AT27C256R. Both are programming compatible.
AC Programming Characteristics
T
A
= 25 ± 5°C, V
CC
= 6.5 ± 0.25V, V
PP
= 13.0 ± 0.25V
Symbol Parameter Test Conditions
(1)
Limits
UnitsMin Max
t
AS
Address Setup Time
Input Rise and Fall Times:
(10% to 90%) 20 ns
Input Pulse Levels:
0.45V to 2.4V
Input Timing Reference Level:
0.8V to 2.0V
Output Timing Reference Level:
0.8V to 2.0V
2 µs
t
OES
OE Setup Time 2 µs
t
DS
Data Setup Time 2 µs
t
AH
Address Hold Time 0 µs
t
DH
Data Hold Time 2 µs
t
DFP
OE High to Output Float Delay
(2)
0 130 ns
t
VPS
V
PP
Setup Time 2 µs
t
VCS
V
CC
Setup Time 2 µs
t
PW
CE Program Pulse Width
(3)
95 105 µs
t
OE
Data Valid from OE
(2)
150 ns
t
PRT
V
PP
Pulse Rise Time During
Programming
50 ns
Atmel’s 27LV256A Integrated Product Identification Code
(1)
Codes
Pins
Hex
DataA0 O7 O6 O5 O4 O3 O2 O1 O0
Manufacturer 000011110 1E
Device Type 1100011008C
AT27LV256A
9
Rapid
Programming Algorithm
A 100 µs CE pulse width is used to program. The address
is set to the first location. V
CC
is raised to 6.5V and V
PP
is
raised to 13.0V. Each address is first programmed with one
100
µs CE pulse without verification. Then a verification /
reprogramming loop is executed for each address. In the
event a byte fails to pass verification, up to 10 successive
100
µs pulses are applied with a verification after each
pulse. If the byte fails to verify after 10 pulses have been
applied, the part is considered failed. After the byte verifies
properly, the next address is selected until all have been
checked. V
PP
is then lowered to 5.0V and V
CC
to 5.0V. All
bytes are read again and compared with the original data to
determine if the device passes or fails.
P1-P3P4-P6P7-P9P10-P12

AT27LV256A-15RI

Mfr. #:
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Description:
IC EPROM 256K PARALLEL 28SOIC
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