FemtoClock® LVCMOS/LVTTL
Clock Generator
840001I-25
Data Sheet
©2016 Integrated Device Technology, Inc Revision A January 15, 20161
GENERAL DESCRIPTION
The 840001I-25 is a General Purpose Clock Generator and a
member of the family of high performance devices from IDT. The
840001I-25 can accept frequency from a 22.4MHz to 170MHz
and generate a 22.4MHz to 170MHz output. The 840001I-25 has
excellent phase jitter performance, from 637kHz – 10MHz integration
range. The 840001I-25 is packaged in a small 8-pin TSSOP, making
it ideal for use in systems with limited board space.
FEATURES
One LVCMOS/LVTTL output, 15Ω output impedence
Output frequency range: 22.4MHz – 170MHz
VCO range: 560MHz to 680MHz
RMS phase jitter @ 125MHz (637kHz - 10MHz): 0.36ps (typical)
Full 3.3V or 2.5V operating supply
-40°C to 85°C ambient operating temperature
Available in lead-free (RoHS 6) package
840001I-25
8-Lead TSSOP
4.40mm x 3.0mm x 0.925mm package body
G Package
Top View
VDD
REF_IN
SEL_0
SEL_1
1
2
3
4
Q
V
DDO
GND
SEL_2
8
7
6
5
BLOCK DIAGRAM PIN ASSIGNMENT
COMMONLY USED FREQUENCY TABLE
Inputs Output Frequency (MHz)
SEL2 SEL1 SEL0 M Divider N Divider REF_IN (MHz) Q
000 25 25 25 25
0 0 1 10 25 62.5 25
0 1 0 4 25 156.25 25
0 1 1 5 25 125 25
1 0 0 10 10 62.5 62.5
1 0 1 5 5 125 125
1 1 0 4 4 156.25 156.25
1 1 1 10 25 62.5 25 (default)
Phase
Detector
VCO
560-680MHz
M
÷4, ÷5, ÷10, ÷25
÷4
÷5
÷10
÷25
3
Pullup
Pullup
REF_IN
SEL_[0:2]
Q
N
840001I-25 Data Sheet
©2016 Integrated Device Technology, Inc Revision A January 15, 20162
TABLE 2. PIN CHARACTERISTICS
TABLE 1. PIN DESCRIPTIONS
Number Name Type Description
1V
DD
Power Positive supply pin.
2 REF_IN Input Pullup Reference input frequency. LVCMOS/LVTTL interface levels.
3, 4, 5 SEL_0, SEL_1, SEL_2 Input Pullup
M and N confi guration select pins.
LVCMOS/LVTTL interface levels.
6 GND Power Power supply ground.
7V
DDO
Power Output supply pin.
8 Q Output
Single-ended clock output. LVCMOS/LVTTL interface levels.
15Ω output impedance.
NOTE: Pullup refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.
Symbol Parameter Test Conditions Minimum Typical Maximum Units
C
IN
Input Capacitance 4 pF
C
PD
Power Dissipation Capacitance
V
DD
, V
DDO
= 3.465V 6 pF
V
DD
, V
DDO
= 2.625V 5 pF
R
PULLUP
Input Pullup Resistor 51
kΩ
R
OUT
Output Impedance 15
Ω
840001I-25 Data Sheet
©2016 Integrated Device Technology, Inc Revision A January 15, 20163
TABLE 3A. POWER SUPPLY DC CHARACTERISTICS, V
DD
= V
DDO
= 3.3V±5%, TA = -40°C TO 85°C
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, V
DD
4.6V
Inputs, V
I
-0.5V to V
DD
+ 0.5 V
Outputs, V
O
-0.5V to V
DDO
+ 0.5V
Package Thermal Impedance, θ
JA
129.5°C/W (0 mps)
Storage Temperature, T
STG
-65°C to 150°C
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifi cations only. Functional
operation of product at these conditions or any conditions beyond
those listed in the DC Characteristics or AC Characteristics is not
implied. Exposure to absolute maximum rating conditions for ex-
tended periods may affect product reliability.
TABLE 3C. LVCMOS/LVTTL DC CHARACTERISTICS, V
DD
= V
DDO
= 3.3V±5% OR 2.5V±5%, TA = -40°C TO 85°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
DD
Positive Supply Voltage 3.135 3.3 3.465 V
V
DDO
Output Supply Voltage 3.135 3.3 3.465 V
I
DD
Power Supply Current 83 mA
I
DDO
Output Supply Current No Load 2 mA
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
DD
Positive Supply Voltage 2.375 2.5 2.625 V
V
DDO
Output Supply Voltage 2.375 2.5 2.625 V
I
DD
Power Supply Current 80 mA
I
DDO
Output Supply Current No Load 2 mA
TABLE 3B. POWER SUPPLY DC CHARACTERISTICS, V
DD
= V
DDO
=2.5V±5%, TA = -40°C TO 85°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
IH
Input High Voltage
V
DD
= 3.465V 2 V
DD
+ 0.3 V
V
DD
= 2.625V 1.7 V
DD
+ 0.3 V
V
IL
Input Low Voltage
V
DD
= 3.465V -0.3 0.8 V
V
DD
= 2.625V -0.3 0.7 V
I
IH
Input High Current
REF_IN,
SEL_[0:2]
V
DD
= V
IN
= 3.465V or 2.625V 5 µA
I
IL
Input Low Current
REF_IN,
SEL_[0:2]
V
DD
= 3.465V or 2.625V, V
IN
= 0V -150 µA
V
OH
Output High Voltage; NOTE 1
V
DDO
= 3.465V 2.6 V
V
DDO
= 2.625V 1.8 V
V
OL
Output Low Voltage; NOTE 1 V
DDO
= 3.465V or 2.625V 0.6 V
NOTE 1: Outputs terminated with 50Ω to V
DDO
/2. See Parameter Measurement Information Section,
“Output Load Test Circuit” diagrams.

840001BGI-25LFT

Mfr. #:
Manufacturer:
IDT
Description:
Clock Synthesizer / Jitter Cleaner 1 LVCMOS OUT CLOCK GEN
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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