LT6700/LT6700HV
16
6700123fh
For more information www.linear.com/LT6700
APPLICATIONS INFORMATION
Figure 3. Isolated PWM or ∆∑ Converter
LT6700-1
V
S
10k
GND
+INA
–INB OUTB
OUTA
100k*100k*
0.22µF
††
+
–
412k*
10k**
470Ω
Lithium
COIN CELL
10k 10k
750Ω
10k
750**
†
3V/5V
3V/5V
ΔΣ
SAMPLE
IN
MOC-207
MOC-207**
PWM OUT
(OR ΔΣ SENSE)
2
1
5
6
5
6
2
1
0.1µF
0.1µF
3V NOM (I
S
< 3mA)
5 • V
REF
= 2V
6700123 F03
22µF
1% METAL FILM
DELETE FOR PWM MODE
CONNECT FOR PWM MODE
OPTIMIZED FOR 2kHz ΔΣ SAMPLING, f
PWM(MAX)
≈ 0.6kHz
*
**
†
††
309k*
NC7S14
309k*
V
IN
0V TO 2V
+
Figure 2. Micropower Thermostat/Temperature Alarm
LT6700-1
V
S
10k
GND
+INA
–INB OUTB
OUTA
499k
R
TH
T
R
TH
= 1M (e.g., YSI 44015, 1.00MΩ AT 25°C)
R
SET
= R
TH
AT T
SET
*RESISTANCE MAY REQUIRE OPTIMIZATION FOR OPERATION
OVER INTENDED R
TH
AND V
SUPPLY
RANGES
HYSTERESIS ZONE ≈0.4°C
R
SET
2 • V
REF
499k 220k 220k*
3.3µF3.3µF
1.4V TO 18V
(I
S
≈ 10µA)
0.1µF
T < T
SET
6700123 F02
charges and discharges in a shallow, controlled fashion.
The multiplied reference signal also contains ripple that is
the hysteresis multiplied by the same factor, so additional
filtering is performed at the sense node of the bridge to
prevent comparator chatter in the section A comparator,
which is performing the actual conditional decision for
the circuit.
Instrumentation Grade Pulse Width Modulator (PWM)
Comparators with hysteresis are frequently employed
to make simple oscillator structures, and the LT6700/
LT6700HV lends itself nicely to forming a charge-balancing
PWM function. The circuit shown in Figure 3 forms a PWM
that is intended to transmit an isolated representation of a
voltage difference, rather like an isolated instrumentation
amplifier. The section B comparator is used to generate a
2V reference supply level for the CMOS NOT gate (inverter),
which serves as the precision switch element for the charge
balancer. The heart of the charge balancer is the section A
comparator, which is detecting slight charge or discharge
states on the 0.22µF “integration” capacitor as it remains
balanced at ≈400mV by feedback through the NOT gate.
The input sense voltage, V
IN
, is converted to an imbal-
ance current that the NOT gate duty cycle is continually
correcting for, thus the digital waveform at the section A
comparator output is a PWM representation of V
IN
with
respect to the 2V “full scale.” In this particular circuit, the
PWM information drives the LED of an opto-coupler, allow-
ing the V
IN
information to be coupled across a dielectric
barrier. As an additional option to the circuit, the feedback
loop can be broken and a second opto-coupler employed to
provide the charge balance management. This configura-
tion allows for clocking the comparator output (externally
to this circuit) and providing synchronous feedback such
that a simple Δ∑ voltage-to-frequency conversion can be
formed if desired. Approximately 11-bit accuracy and noise
performance was observed in a one second integration
period for duty factors from 1% to 99%.
