1. General description
The ADC1207S080 is a 12-bit Analog-to-Digital Converter (ADC) optimized for direct
Input Frequency (IF) sampling and supporting the most demanding use conditions in ultra
high IF radio transceivers for cellular infrastructure and other applications such as wireless
infrastructure, optical networking and fixed telecommunication. Due to its broadband input
capabilities, the ADC1207S080 is ideal for single and multiple carriers data conversion.
Operating at a maximum sampling rate of 80 MHz, analog input signals are converted into
12-bit binary coded digital words. All static digital inputs are CMOS compatible. All output
signals are Low-Voltage Complementary Metal-Oxide Semiconductor (LVCMOS)
compatible. The ADC1207S080 offers the most flexible acquisition control system
because of its programmable Complete Conversion Signal (CCS) that allows to adjust the
delay of the acquisition clock.
The ADC1207S080 offers the lowest input capacitance (< 1 pF) and therefore the highest
flexibility in front-end aliasing filter strategy because of its internal front-end buffer.
2. Features
n 12-bit resolution
n Differential input with 375 MHz bandwidth
n 90 dB SFDR; 71 dB S/N (f
i
= 225 MHz; f
clk
= 80 MHz; B = 5 MHz)
n 74 dB SFDR; 66.5 dB S/N (f
i
= 175 MHz; f
clk
= 80 MHz; B = Nyquist)
n High speed sampling rate up to 80 MHz
n Internal front-end buffer (input capacitance < 1 pF)
n Programmable acquisition output clock (complete conversion signal)
n Full-scale controllable from 1.5 V to 2 V (p-p); continuous scale
n Single 5 V power supply
n 3.3 V LVCMOS compatible digital outputs
n Binary or two’s-complement LVCMOS outputs
n CMOS compatible static digital inputs
n Only 2 clock cycles latency
n Industrial temperature range from 40 °C to +85 °C
n HTQFP48 package
ADC1207S080
Single 12 bits ADC, up to 80 MHz with direct/ultra high IF
sampling
Rev. 02 — 7 August 2008 Product data sheet
ADC1207S080_2 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 02 — 7 August 2008 2 of 21
NXP Semiconductors
ADC1207S080
Single 12 bits ADC, up to 80 MHz with direct/ultra high IF sampling
3. Applications
High speed analog to digital conversion for:
n Radio transceivers
n Wireless infrastructure
n Cable modem
n Digital storage scope
n Fixed telecommunication,
n Optical networking
n Wireless Local Area Network (WLAN) infrastructure.
n General purpose applications
4. Ordering information
5. Block diagram
Table 1. Ordering information
Type number Package Sampling
frequency
(MHz)
Name Description Version
ADC1207S080HW HTQFP48 plastic thermal enhanced thin quad flat package; 48 leads;
body 7 × 7 × 1 mm; exposed die pad
SOT545-2 80
Fig 1. Block diagram
1212
2
014aaa430
TRACK
AND
HOLD
ADC
CORE
LATCH
LATCH
RESISTOR
LADDERS
CLOCK DRIVER
OUTPUTS
ENABLE
CMADC
REFERENCE
VREF
REFERENCE
ADC1207S080
U/I
front-end
buffer
FSOUT
INN
FSIN
IN
DEL0 to
DEL1
CCS
D0 to D11
OTC
V
CCO
IR
DECCMADC
CLK
CLKN
CE_N
ADC1207S080_2 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 02 — 7 August 2008 3 of 21
NXP Semiconductors
ADC1207S080
Single 12 bits ADC, up to 80 MHz with direct/ultra high IF sampling
6. Pinning information
6.1 Pinning
6.2 Pin description
Fig 2. Pin configuration
ADC1207S080HW
n.c. D0
AGND1 D1
IN D2
CMADC D3
INN D4
AGND1 D5
DEC D6
n.c. D7
FSOUT D8
FSIN D9
n.c. D10
n.c. D11
DGND
n.c. AGND1
DEL1 V
CCA1
DEL0 AGND1
V
CCD2
V
CCA1
DGND2 V
CCA2
CE_N AGND2
OTC DGND1
OGND V
CCD1
V
CCO
CLK
OGND CLKN
V
CCO
IR
DGND1
CCS
014aaa431
1
2
3
4
5
6
7
8
9
10
11
12
36
35
34
33
32
31
30
29
28
27
26
25
13
14
15
16
17
18
19
20
21
22
23
48
47
46
45
44
43
42
41
40
39
38
37
24
Table 2. Pin description
Symbol Pin Type
[1]
Description
n.c. 1 - not connected
AGND1 2 G analog ground 1
IN 3 I analog input voltage
CMADC 4 O regulator common mode ADC output
INN 5 I complementary analog input voltage
AGND1 6 G analog ground 1
DEC 7 I/O decoupling node
n.c. 8 - not connected
FSOUT 9 O full-scale reference voltage output
FSIN 10 I full-scale reference voltage input
n.c. 11 - not connected
n.c. 12 - not connected
n.c. 13 - not connected
DEL1 14 I complete conversion signal delay input 1
DEL0 15 I complete conversion signal delay input 0
V
CCD2
16 P digital supply voltage 2 (5.0 V)

ADC1207S080HW/C1:1

Mfr. #:
Manufacturer:
Description:
IC ADC 12BIT 80MHZ SGL 48-HTQFP
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet