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PI90LVT386AE

P1-P3P4-P6P7-P8
1
PS8574D 11/11/08
Block Diagram
Features
• Sixteen line receivers meet or exceed the requirements of the
ANSI TIA/EIA-644-1995 Standard
• Designed for signaling rates up to 660 Mbps
• 0V to 3V common-mode input voltage range
• Operates from a single 3.3V supply
• Typical propagation delay time: 2.6ns
• Output skew 100ps (typical)
• Part-to-part skew is less than 1ns
• Integrated 110-Ohm termination on PI90LVT386
• Low Voltage TTL (LVTTL) levels are 5V tolerant
• Open-circuit fail safe
• Flow-through pin out
• Packaging (Pb-free & Green available):
- 64-Pin Thin Shrink Small Output TSSOP (A)
Description
The PI90LVx386 family consists of sixteen differential line receivers
with 3-state outputs that implement Low-Voltage Differential
Signaling (LVDS). Any of the differential receivers will provide a
valid logical output state with a ±100mV differential input voltage
within the input common-mode voltage range that allows 0 to 3V of
ground potential difference between two LVDS nodes. The indepen-
dent EN pins can be used to place the outputs in either a normal logic
state (high or low logic levels) or a high-impedance state. In high-
impedance state, outputs neither load nor drive the bus lines.
The intended application of these devices, and their signaling
techniques, is for point-to-point baseband data transmission over
controlled impedance media of approximately 100-ohms with a
100-Ohm termination resistor. The PI90LVT386 integrates the termi-
nating resistors while the PI90LV386 requires external resistors.
The transmission media may be printed circuit board traces,
backplanes, or cables. The PI90LV386’s 16 receivers integrated into
the same substrate allow precise timing alignment.
These parts are characterized for operation from –40°C to 85°C.
PI90LV386/PI90LVT386
High-Speed Differential Line Receivers
1
1R
IN1+
1R
IN1–
1R
IN2+
1R
IN2–
1R
IN3+
1R
IN3–
1R
IN4–
2R
IN1+
2R
IN1–
2R
IN2–
2R
IN3+
2R
IN3–
2R
IN4+
2R
IN4–
1R
IN4+
2R
IN2–
3R
IN1+
3R
IN4–
3R
IN1–
3R
IN2+
3R
IN2–
3R
IN3+
3R
IN3–
EN3
GND
V
CC
V
CC
GND
1R
OUT4
EN2
1R
OUT1
V
CC
1R
OUT2
1R
OUT3
2R
OUT4
2R
OUT1
2R
OUT2
2R
OUT3
3R
OUT4
3R
OUT1
3R
OUT2
3R
OUT3
4R
OUT4
4R
OUT1
4R
OUT2
4R
OUT3
GND
GND
V
CC
EN1
V
CC
V
CC
GND
EN4
GND
16 Receivers
3R
IN4+
4R
IN1+
4R
IN1–
4R
IN2+
4R
IN2–
4R
IN3+
4R
IN3–
4R
IN4+
4R
IN4–
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
Pin Configuration
64-Pin
A
08-0295
2
PS8574D 11/11/08
PI90LV386/PI90LVT386
High-Speed Differential Line Receivers
Supply Voltage Range, V
DD
(1)
....................................... –0.5V to 4V
Voltage Range: ............................................... Enables or R
OUT
–0.5V to V
DD
+2V
R
IN+
or R
IN–
........................................................................ –0.5V to 4V
Electrostatic Discharge
(2):
R
IN+
, R
IN–
, and GND ....................... Class 3, A: 10kV, B:700V
All Pins .............................................. Class 3, A: 8kV, B:600V
Storage Temperature Range ............................. –65°C to 150°C
Lead Temperature 1, 6mm (1/16 inch)
from case for 10 seconds .................................................... 260°C
.niM.moN.xaMstinU
V,egatloVylppuS
CC
0.33.36.3
V
V,egatloVtupnIleveL-hgiH
HI
0.2
V,egatloVtupnIleveL-woL
LI
8.0
egatloVtupnIlaitnereffiDfoedutingaM ⏐V
DI
⏐ 1.06.0
V,egatloVtupniedoM-nommoC
CI
⏐V
DI
⏐
2
–4.2 ⏐V
DI
⏐
2
V
CC
8.0–
ria-eerfgnitarepOT,erutarepmet
A
04–58C°
Absolute Maximum Ratings
Over Operating Free-Air Temperature
(unless otherwise noted)
†
† Stresses beyond those listed under “Absolute Maximum Ratings” may
cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond
those indicated under "Recommended Operating Conditions" is not
implied. Exposure to Absolute-Maximum-Rated conditions for extended
periods may affect device reliability.
Notes:
1. All voltage values, except differential I/O bus voltages, are with
respect to ground terminal.
2. Tested in accordance with MIL-STD-883C Method 3015.7
Recommended Operating Conditions
Function Table
tupnIlaitnereffiDselbanEtuptuO
R
NI
±NER
TUO
V
DI
≥ Vm001HH
Vm001– < V
DI
≤ Vm001H?
V
DI
≤ Vm001–HL
XLZ
nepOHH
XHR
TUO
Notes:
H = high level, L = low level, X = irrelevent
Z = high impedance (off), ? = indeterminate
0
08-0295
3
PS8574D 11/11/08
PI90LV386/PI90LVT386
High-Speed Differential Line Receivers
Electrical Characteristics Over Recommended Operating Conditions (unless otherwise noted)
lobmySretemaraPsnoitidnoCtseT.niM.pyT
)1(
.xaMstinU
V
+HTI
dlohserhtegatlovtupnilaitnereffidgniog-evitisoP 001
Vm
V
–HTI
dlohserhtegatlovtupnilaitnereffidgniog-evitageN 001–
V
HO
egatlovtuptuolevel-hgiHI
HO
Am8–=4.21.3
V
V
LO
egatlovtuptuolevel-woLI
LO
Am8=3.054.0
I
CC
tnerruCylppuS
daoloN,delbanE0465
Am
delbasiD3
I
I
tnerruCtupnI
R(
+NI
Rro
–NI
)stupni
VL
V
I
V0=02–
Aμ
V
I
V4.2=2.1–
TVL
V
I
nepotupnirehto,V0=04–
V
I
nepotupnirehto,V4.2=4.2–
I
)FFO(I
R(tnerructupniffo-rewoP
+NI
Rro
–NI
)stupniV
CC
V,V0=
I
V4.2=2102±
I
HI
)selbane(tnerructupnilevel-hgiHV
HI
V2=
01
I
LI
)selbane(tnerructupnilevel-woLV
LI
V8.0=
I
ZO
tnerructuptuoecnadepmi-hgiH
V
O
V0=1±
V
O
V6.3=01
C
NI
R(ecnaticapactupnI
+NI
Rro
–NI
)DNGotstupni
V
DI
Vt90E5.2nis4.0=
6Fp
Z
)t(
)TVL(ecnadepmInoitanimreT 88011341smhO
Note:
1. All typical values are at 25°C and with a 3.3V supply.
08-0295
P1-P3P4-P6P7-P8

PI90LVT386AE

Mfr. #:
Buy PI90LVT386AE
Manufacturer:
Diodes Incorporated
Description:
Bus Receivers 16 LVDS Receivers
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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