CAT4103
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9
Block Diagram
Figure 14. CAT4103 Functional Block Diagram
Current Setting
1.2 V Ref
BOUT
+
LOUT
RSET3
Current Setting
RSET2
Current Setting
RSET1
BIN
VDD
LED1 LED2 LED3
CIN
CLOCK
LATCH
BLANK
CURRENT
SINKS
SHIFT
REGISTER
SIN
LIN
L0 L1 L2
S0 S1 S2
SOUT
COUT
GND
D
CK
Q
Basic Operation
The CAT4103 uses 3 independent current sinks to
accurately regulate the current in each LED channel to 400
times the current sink from the corresponding RSET pin.
Each of the resistors tied to the RSET1, RSET2, RSET3 pins
set the current respectively in the LED1, LED2, and LED3
channels. Table 6 shows some standard resistor values for
RSET and the corresponding LED current.
Table 6. RSET RESISTOR SETTINGS
LED Current [mA]
RSET [kW]
20 24.9
60 8.45
100 5.23
175 3.01
Tight current regulation for all channels is possible over
a wide range of input and LED voltages due to independent
current sensing circuitry on each channel. The LED
channels have a low dropout of 0.4 V or less for all current
ranges and supply voltages. This helps improve heat
dissipation and efficiency over other competing solutions.
Upon power−up, an under−voltage lockout circuit clears
all latches and shift registers and sets all outputs to off. Once
the VDD supply voltage is greater than the under−voltage
lockout threshold, the device can be programmed.
Pull−up and pull−down resistors are internally provided to
set the state of the BIN and LIN pins to low current off state
when not externally driven.
A high−speed 4−wire interface is provided to program the
state of each LED channel ON or OFF.
The 4−wire interface contains a 3−bit serial−to−parallel
shift register (S0−S2) and a 3−bit latch (L0−L2). The shift
register operates on a first−in first−out (FIFO) basis. The
most significant bit S2 corresponds to the first data entered
in from SIN. Programming the serial−to−parallel register is
accomplished via SIN and CIN input pins. On each rising
edge of the CIN signal the data from SIN is moved through
the shift register serially. Data is also moved out of SOUT
to the next device if programming more than one device on
the same interface.
On the rising edge of LIN, the data content of the serial to
parallel shift register is reflected in the latches. On the falling
edge of LIN, the state of the serial−to−parallel register at that
particular time is saved in the latches and does not change
regardless of the content of the serial to parallel register.
BIN is used to disable all LEDs off at one time while still
maintaining the data contents of the latch register. BIN is an
active low input pin. When low the outputs reflect the data
in the latches. When high the outputs are all high impedance
(LEDs off).
All 4−wire inputs have a corresponding output driver for
cascaded systems (SOUT, COUT, LOUT, BOUT). These
output buffers allow many CAT4103 drivers to be cascaded
without signal and timing degradation due to long wire
interconnections.
