ADA4930-1SCPZ-EPR2

Enhanced Product ADA4930-1-EP
Rev. B | Page 7 of 12
ABSOLUTE MAXIMUM RATINGS
Table 7.
Parameter Rating
Supply Voltage 5.5 V
Power Dissipation
See Figure 3
Storage Temperature Range 65°C to +125°C
Operating Temperature Range 55°C to +105°C
Lead Temperature (Soldering, 10 sec) 300°C
Junction Temperature 150°C
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
THERMAL RESISTANCE
θ
JA
is specified for the device (including exposed pad) soldered
to a high thermal conductivity 2s2p circuit board, as described
in EIA/JESD51-7.The θ
JA
for the 16-Lead LFCSP(exposed pad)
package is 81.6 °C/W.
MAXIMUM POWER DISSIPATION
The maximum safe power dissipation in the ADA4930-1-EP package
is limited by the associated rise in junction temperature (T
J
) on the
die. At approximately 150°C, which is the glass transition
temperature, the plastic changes its properties. Even temporarily
exceeding this temperature limit can change the stresses that the
package exerts on the die, permanently shifting the parametric
performance of the ADA4930-1-EP. Exceeding a junction
temperature of 150°C for an extended period can result in
changes in the silicon devices, potentially causing failure.
The power dissipated in the package (P
D
) is the sum of the
quiescent power dissipation and the power dissipated in the
package due to the load drive. The quiescent power is the voltage
between the supply pins (V
S
) times the quiescent current (I
S
).
The power dissipated due to the load drive depends on the
particular application. The power due to load drive is calculated
by multiplying the load current by the associated voltage drop
across the device. RMS voltages and currents must be used in
these calculations.
Airflow increases heat dissipation, effectively reducing θ
JA
. In
addition, more metal directly in contact with the package leads/
exposed pad from metal traces, through holes, ground, and
power planes reduces θ
JA
.
Figure 3 shows the maximum safe power dissipation vs. the
ambient temperature for the ADA4930-1-EP single 16-lead
LFCSP (81.6°C/W) on a JEDEC standard 4-layer board.
3.0
0.0
–55 –35 –15 5 25 45 1058565
MAXIMUM POWER DISSIPATION (W)
AMBIENT TEMPERATUREC)
10371-004
0.5
1.0
1.5
2.0
2.5
T
J
= 150°C
16-LEAD LFCSP
Figure 3. Maximum Power Dissipation vs. Ambient Temperature,
4-Layer Board
ESD CAUTION
ADA4930-1-EP Enhanced Product
Rev. B | Page 8 of 12
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
10371-005
12
11
10
1
3
4
PD
+OUT
–OUT
9
V
OCM
–FB
–IN
2+IN
+FB
6
+V
S
5
+V
S
7
+V
S
8
+V
S
16
–V
S
15
–V
S
14
–V
S
13
–V
S
NOTES
1. EXPOSED PADDLE. THE EXPOSED PAD IS NOT
ELECTRICALLY CONNECTED TO THE DEVICE. IT IS
TYPICALLY SOLDERED TO GROUND OR A POWER
PLANE ON THE PCB THAT IS THERMALLY CONDUCTIVE.
ADA4930-1-EP
TOP VIEW
(Not to Scale)
Figure 4. Pin Configuration
Table 8. Pin Function Descriptions
Pin No. Mnemonic Description
1 −FB Negative Output for Feedback Component Connection.
2 +IN Positive Input Summing Node.
3 −IN Negative Input Summing Node.
4 +FB Positive Output for Feedback Component Connection.
5 to 8 +V
S
Positive Supply Voltage.
9 V
OCM
Output Common-Mode Voltage.
10 +OUT Positive Output for Load Connection.
11 −OUT Negative Output for Load Connection.
12
PD
Power-Down Pin.
13 to 16 −V
S
Negative Supply Voltage.
EPAD
Exposed Paddle. The exposed pad is not electrically connected to the device. It is typically
soldered to ground or a power plane on the PCB that is thermally conductive.
Enhanced Product ADA4930-1-EP
Rev. B | Page 9 of 12
OUTLINE DIMENSIONS
3.10
3.00 SQ
2.90
0.32
0.25
0.20
1.80
1.70 SQ
1.60
1
0.50
BSC
BOTTOM VIEWTOP VIEW
16
5
8
9
12
13
4
0.50
0.40
0.30
0.05 MAX
0.02 NOM
0.20 REF
0.20 MIN
COPLANARITY
0.08
PIN 1
INDICATOR
0.80
0.75
0.70
COMPLIANT
TO
JEDEC STANDARDS MO-220-WEED-2.
03-28-2017-A
PKG-004326
SEATING
PLANE
SIDE VIEW
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
PIN 1
IND IC AT OR AREA OPTIONS
(SEE DETAIL A)
DETAIL A
(JEDEC 95)
Figure 5. 16-Lead Lead Frame Chip Scale Package [LFCSP]
3 mm × 3 mm Body and 0.75 mm Package Height
(CP-16-35)
Dimensions shown in millimeters
ORDERING GUIDE
Model
1
Temperature Range
Package Description
Package Option
Ordering Quantity
Branding
ADA4930-1SCPZ-EPR2 55°C to +105°C 16-Lead LFCSP CP-16-35 250 H2X
ADA4930-1SCPZ-EPR7 55°C to +105°C 16-Lead LFCSP CP-16-35 1,500 H2X
ADA4930-1SCPZ-EPRL 55°C to +105°C 16-Lead LFCSP CP-16-35 5,000 H2X
1
Z = RoHS Compliant Part.

ADA4930-1SCPZ-EPR2

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Differential Amplifiers UltraLow Dist Low Vltg ADC Driver
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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