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DC339A-B

P1-P3P4-P6P7-P8
1
DEMO MANUAL DC339-A/-B
LOW DROPOUT REGULATOR
PARAMETER CONDITIONS MIN TYP MAX UNITS
Input Voltage Range 2.3 20 V
Output Voltage (Note 1) 1.205 1.220 1.235 V
V
IN
= 3.5V, JP2 On Pins 5, 6 2.455 2.506 2.571 V
V
IN
= 4V, JP2 On Pins 7, 8 2.936 3.019 3.103 V
V
IN
= 4.3V, JP2 On Pins 9, 10 3.207 3.300 3.396 V
V
IN
= 5V, JP2 On Pins 11, 12 4.848 5.006 5.167 V
Line Regulation ∆V
IN
= 2.3V to 20V 1 5 mV
Quiescent Current I
LOAD
= 0 30 50 µA
Load Regulation ∆I
LOAD
= 1mA to 150mA (DC339-A) or 300mA (DC339-B) 0.2 1 %
SHDN Pin Threshold On to Off 0.45 0.65 V
Off to On, I
LOAD
= 150mA (DC339-A) or 300mA (DC339-B) 0.8 1.8 V
Output Voltage Noise I
LOAD
= 150mA (DC339-A) or 300mA (DC339-B) BW = 10Hz to 100kHz 20 µV
RMS
Note 1: Output voltage variations include ±1% tolerance of feedback divider network. For tighter voltage range, use lower tolerance resistors or use fixed
voltage output devices.
LT1762/LT1962
150mA and 300mA Low Noise
Micropower LDO Regulators
, LTC and LT are registered trademarks of Linear Technology Corporation.
DESCRIPTIO
U
PERFOR A CE SU ARY
UWWW
Demonstration circuits DC339-A/DC339-B are low noise
micropower voltage regulators using the LT
®
1762 and
LT1962 in the 8-lead MSOP package. These circuits are
primarily used in cellular phones, voltage-controlled
T
A
= 25°C, V
IN
= 2.3V, V
SHDN
= 5V, I
LOAD
= 1mA, V
OUT
= 1.22V (JP2 set on pins 1 and 2), unless otherwise specified.
oscillators and RF power supplies, and as local regula-
tors in larger systems. Their ability to tolerate a wide
variety of output capacitors makes them ideal in space-
and cost-sensitive systems.
TYPICAL PERFOR A CE CHARACTERISTICS A D BOARD PHOTO
U
U
W
LOAD CURRENT (mA)
500
450
400
350
300
250
200
150
100
50
0
DROPOUT VOLTAGE (mV)
1762 G01
020
40
60 80 100
120
140 160
T
J
= 125°C
T
J
= 25°C
LT1762 Typical Dropout Voltage LT1762 (5V Output)
10Hz to 100kHz Output Noise
V
OUT
100µV/DIV
1ms/DIV 1762 G47
C
OUT
= 10µF
I
L
= 150mA
Component Side
2
DEMO MANUAL DC339-A/-B
LOW DROPOUT REGULATOR
PACKAGE A D SCHE ATIC DIAGRA S
U
WW
LT1762EMS8
LT1962EMS8
IN
NC
NC
SHDN
OUT
ADJ
BYP
GND
C2
0.01µF
U1
LT1762/
LT1962EMS8
C3
10µF
10V
1210
ADJ1
1.22V
USER
SELECT
2.5V 3V 3.3V 5V
R1
261k
R5
249k
R2
365k
R3
422k
R4
768k
E3
OUT
E4
GND
2
1
4
3
6
5
8
JP2
7
10
DC339 F01
9
12
11
C1
1µF
0603
1
2
3
4
8
7
6
5
NOTE: UNLESS OTHERWISE SPECIFIED
1. THERE ARE TWO TYPES OF ASSEMBLY:
DC339-A, LT1762, 150mA
DC339-B, LT1962, 300mA
E1
IN
E2
SHDN
JP1
1
2
3
4
OUT
SENSE/ADJ*
BYP
GND
8
7
6
5
IN
NC
NC
SHDN
TOP VIEW
MS8 PACKAGE
8-LEAD PLASTIC MSOP
LT1962 Typical Dropout Voltage LT1962 (5V Output)
10Hz to 100kHz Output Noise
V
OUT
100µV/DIV
1ms/DIV
1962 G47C
OUT
= 10µF
I
L
= 300mA
TYPICAL PERFOR A CE CHARACTERISTICS A D BOARD PHOTO
U
U
W
OUTPUT CURRENT (mA)
0
DROPOUT VOLTAGE (mV)
150
200
250
150
250
1962 G01
100
50
0
50 100 200
300
350
400
300
T
J
= 125°C
T
J
= 25°C
Component Side
Figure 1. LT1762/LT1962 150mA/300mA Low Noise Micropower LDO Regulator
3
DEMO MANUAL DC339-A/-B
LOW DROPOUT REGULATOR
REFERENCE
DESIGNATOR QUANTITY PART NUMBER DESCRIPTION VENDOR TELEPHONE
ADJ1 0 Optional Resistor
C1 1 0603ZG105ZAT1A 1µF 10V Y5V Chip Capacitor AVX (843) 946-0362
C2 1 0402ZG104ZAT1A 0.1µF 10V Y5V Chip Capacitor AVX (843) 946-0362
C3 1 LMK325BJ106MN 10µF 10V X7R Chip Capacitor Taiyo-Yuden (408) 573-4150
E1 to E4 4 2308-2 Pad Turret Mill-Max (516) 922-6000
JP1 0 Optional Jumper
JP2 1 6351-12G1 Connector, SMT2X6, 0.39" Gap Comm-Con (626) 301-4200
Shunts for 2 CTAIJ1MM-G Shunts for 0.39" Gap Comm-Con (626) 301-4200
JP1 and JP2
R1 1 CR05-2613FM 261k 1/16W 1% Chip Resistor AAC (800) 508-1521
R2 1 CR05-3653FM 365k 1/16W 1% Chip Resistor AAC (800) 508-1521
R3 1 CR05-4223FM 422k 1/16W 1% Chip Resistor AAC (800) 508-1521
R4 1 CR05-7683FM 768k 1/16W 1% Chip Resistor AAC (714) 255-9186
R5 1 CR05-2493FM 249k 1/16W 1% Chip Resistor AAC (714) 255-9186
U1 1 LT1762EMS8 or 8-Lead MSOP IC Version -A LTC (408) 432-1900
LT1962EMS8 8-Lead MSOP IC Version -B
PARTS LIST
OPERATIO
U
HOOK-UP
Solid turret terminals are provided for easy connection to
supplies and test equipment. Connect a 0V to 20V, 0.5A
power supply across the IN and GND terminals and the
load across the OUT and GND terminals. The SHDN pin can
be disconnected from IN via JP1 to allow for separate
shutdown control via a secondary control line. JP2 can be
used to select any of a number of common fixed output
voltages, or used in conjunction with ADJ1 to create a
custom output voltage using the formula:
ADJ1 = (V
OUT
– 1.22V)/4.93µA
OUTPUT CAPACITOR SELECTION
The output capacitor C3 is a 10µF X7R ceramic chip
capacitor. Should a different output capacitor be desired,
care must be exercised with the selection. Many ceramic
capacitor dielectrics exhibit strong temperature and
voltage characteristics that reduce their effective capaci-
tance to as low as 10% to 20% of nominal over the full
range. For further information, see Linear Technology
Application Note 83, “Performance Verification of Low
Noise, Low Dropout Regulators,” Appendix␣ B, “Capaci-
tor Selection Considerations,” reprinted below.
CAPACITOR SELECTION CONSIDERATIONS
Bypass Capacitance and Low Noise Performance
Adding a capacitor between the regulator’s V
OUT
and BYP
pins lowers output noise. A good quality, low leakage
capacitor is recommended. This capacitor bypasses the
regulator’s reference, providing a low frequency noise
pole. A 0.01µF capacitor lowers the output voltage noise
to 20µV
RMS
. Using a bypass capacitor also improves
transient response. With no bypassing and a 10µF output
capacitor, a 10mA to 500mA load step settles within 1%
of final value in under 100µs. With a 0.01µF bypass
capacitor, the output settles within 1% for the same load
step in under 10µs; total output deviation is inside 2.5%.
Regulator start-up time is inversely proportional to
bypass capacitor size, slowing to 15ms with a 0.01µF
bypass capacitor and 10µF at the output.
P1-P3P4-P6P7-P8

DC339A-B

Mfr. #:
Buy DC339A-B
Manufacturer:
Analog Devices Inc.
Description:
Power Management IC Development Tools LT1962EMS8 - Low Noise LDO Regulator, 2.
Lifecycle:
New from this manufacturer.
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