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74HC04DR2G

P1-P3P4-P6P7-P7
© Semiconductor Components Industries, LLC, 2007
March, 2007 − Rev. 1
1 Publication Order Number:
74HC04/D
74HC04
Hex Inverter
High−Performance Silicon−Gate CMOS
The 74HC04 is identical in pinout to the LS04 and the MC14069.
The device inputs are compatible with Standard CMOS outputs; with
pullup resistors, they are compatible with LSTTL outputs.
The device consists of six three−stage inverters.
Features
• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS and TTL
• Operating Voltage Range: 2.0 to 6.0 V
• Low Input Current: 1.0 mA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance With the JEDEC Standard No. 7A Requirements
• ESD Performance: HBM > 2000 V; Machine Model > 200 V
• Chip Complexity: 36 FETs or 9 Equivalent Gates
• These are Pb−Free Devices
LOGIC DIAGRAM
Y1A1
A2
A3
A4
A5
A6
Y2
Y3
Y4
Y5
Y6
1
3
5
9
11
13
2
4
6
8
10
12
Y = A
Pinout: 14−Lead Packages (Top View)
1314 12 11 10 9 8
21 34567
V
CC
A6 Y6 A5 Y5 A4 Y4
A1 Y1 A2 Y2 A3 Y3 GND
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MARKING
DIAGRAMS
HC04 = Device Code
A = Assembly Location
WL or L = Wafer Lot
Y = Year
WW or W = Work Week
G or G = Pb−Free Package
TSSOP−14
DT SUFFIX
CASE 948G
14
1
SOIC−14
D SUFFIX
CASE 751A
14
1
HC04G
AWLYWW
1
14
HC
04
ALYW G
G
1
14
L
H
FUNCTION TABLE
Inputs Outputs
A
H
L
Y
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
ORDERING INFORMATION
(Note: Microdot may be in either location)
74HC04
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2
MAXIMUM RATINGS
Symbol Parameter Value Unit
V
CC
DC Supply Voltage (Referenced to GND) – 0.5 to + 7.0 V
V
in
DC Input Voltage (Referenced to GND) – 0.5 to V
CC
+ 0.5 V
V
out
DC Output Voltage (Referenced to GND) – 0.5 to V
CC
+ 0.5 V
I
in
DC Input Current, per Pin ±20 mA
I
out
DC Output Current, per Pin ±25 mA
I
CC
DC Supply Current, V
CC
and GND Pins ±50 mA
P
D
Power Dissipation in Still Air, SOIC Package†
TSSOP Package†
500
450
mW
T
stg
Storage Temperature – 65 to + 150
_C
T
L
Lead Temperature, 1 mm from Case for 10 Seconds
SOIC or TSSOP Package
260
_C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
*This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be
taken to avoid applications of any voltage higher than maximum rated voltages to this high−impedance circuit. For proper operation, V
in
and
V
out
should be constrained to the range GND v (V
in
or V
out
) v V
CC
. Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either GND or V
CC
). Unused outputs must be left open.
†Derating − SOIC Package: – 7 mW/_C from 65_ to 125_C
TSSOP Package: − 6.1 mW/_C from 65_ to 125_C
For high frequency or heavy load considerations, see Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D).
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Max Unit
V
CC
DC Supply Voltage (Referenced to GND) 2.0 6.0 V
V
in
, V
out
DC Input Voltage, Output Voltage (Referenced to GND) 0 V
CC
V
T
A
Operating Temperature, All Package Types – 55 + 125
_C
t
r
, t
f
Input Rise and Fall Time V
CC
= 2.0 V
(Figure 1) V
CC
= 4.5 V
V
CC
= 6.0 V
0
0
0
1000
500
400
ns
ORDERING INFORMATION
Device Package Shipping
†
74HC04DR2G SOIC−14
(Pb−Free)
2500 / Tape & Reel
74HC04DTR2G TSSOP−14*
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*This package is inherently Pb−Free.
74HC04
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3
DC CHARACTERISTICS (Voltages Referenced to GND)
V
CC
(V)
Guaranteed Limit
Symbol Parameter Condition −55 to 25°C ≤85°C ≤125°C Unit
V
IH
Minimum High−Level Input
Voltage
V
out
= 0.1V or V
CC
−0.1V
|I
out
| ≤ 20mA
2.0
3.0
4.5
6.0
1.50
2.10
3.15
4.20
1.50
2.10
3.15
4.20
1.50
2.10
3.15
4.20
V
V
IL
Maximum Low−Level Input
Voltage
V
out
= 0.1V or V
CC
− 0.1V
|I
out
| ≤ 20mA
2.0
3.0
4.5
6.0
0.50
0.90
1.35
1.80
0.50
0.90
1.35
1.80
0.50
0.90
1.35
1.80
V
V
OH
Minimum High−Level Output
Voltage
V
in
= V
IH
or V
IL
|I
out
| ≤ 20mA
2.0
4.5
6.0
1.9
4.4
5.9
1.9
4.4
5.9
1.9
4.4
5.9
V
V
in
=V
IH
or V
IL
|I
out
| ≤ 2.4mA
|I
out
| ≤ 4.0mA
|I
out
| ≤ 5.2mA
3.0
4.5
6.0
2.48
3.98
5.48
2.34
3.84
5.34
2.20
3.70
5.20
V
OL
Maximum Low−Level Output
Voltage
V
in
= V
IH
or V
IL
|I
out
| ≤ 20mA
2.0
4.5
6.0
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
V
V
in
= V
IH
or V
IL
|I
out
| ≤ 2.4mA
|I
out
| ≤ 4.0mA
|I
out
| ≤ 5.2mA
3.0
4.5
6.0
0.26
0.26
0.26
0.33
0.33
0.33
0.40
0.40
0.40
I
in
Maximum Input Leakage
Current
V
in
= V
CC
or GND 6.0 ±0.1 ±1.0 ±1.0
mA
I
CC
Maximum Quiescent Supply
Current (per Package)
V
in
= V
CC
or GND
I
out
= 0mA
6.0 2.0 20 40
mA
NOTE: Information on typical parametric values can be found in Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D).
AC CHARACTERISTICS (C
L
= 50pF, Input t
r
= t
f
= 6ns)
V
CC
(V)
Guaranteed Limit
Symbol Parameter −55 to 25°C ≤85°C ≤125°C Unit
t
PLH
,
t
PHL
Maximum Propagation Delay, Input A or B to Output Y
(Figures 1 and 2)
2.0
3.0
4.5
6.0
75
30
15
13
95
40
19
16
110
55
22
19
ns
t
TLH
,
t
THL
Maximum Output Transition Time, Any Output
(Figures 1 and 2)
2.0
3.0
4.5
6.0
75
27
15
13
95
32
19
16
110
36
22
19
ns
C
in
Maximum Input Capacitance 10 10 10 pF
NOTE: For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the ON
Semiconductor High−Speed CMOS Data Book (DL129/D).
C
PD
Power Dissipation Capacitance (Per Inverter)*
Typical @ 25°C, V
CC
= 5.0 V
pF
20
* Used to determine the no−load dynamic power consumption: P
D
= C
PD
V
CC
2
f + I
CC
V
CC
. For load considerations, see Chapter 2 of the
ON Semiconductor High−Speed CMOS Data Book (DL129/D).
P1-P3P4-P6P7-P7

74HC04DR2G

Mfr. #:
Buy 74HC04DR2G
Manufacturer:
ON Semiconductor
Description:
Inverters HEX INVERTER
Lifecycle:
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