Document number: DS39161 Rev. 2 - 2
January 2017
© Diodes Incorporated
Timing Diagram
Vth
Vth
/RESET
RESET
T
Delay
T
Delay
T
Delay
T
Delay
Vcc
Vth
Functional Description
Microprocessors (µPs) and microcontrollers (µC) have a reset input to ensure that it starts up in a known state. The APX803S drive the µP’s reset
input to prevent code-execution errors during power-up, power-down, or brownout conditions. They assert a reset signal whenever the V
CC
supply
voltage declines below a preset threshold and keep it asserted for a fixed period of time after V
CC
has risen above the reset threshold. For the
APX803S00 this period is a minimum of 1ms while for other APX803S variants it is at least 140ms. The APX803S has an open-drain output stage.
Ensuring a Valid Reset Output Down to V
CC
= 0
is guaranteed to be a logic low for V
CC
> 1V. Once V
CC
exceeds the reset threshold, an internal timer keeps
low for the reset
timeout period; after this interval,
goes high. If a brownout condition occurs (V
CC
dips below the
reset threshold),
goes
low. Any time V
CC
goes below the reset threshold, the internal timer resets to zero, and
goes low. The internal timer starts after V
CC
returns above the reset threshold, and
remains low for the reset timeout period.
When V
CC
falls below 1V, the APX803S
output no longer sinks current — it becomes an open circuit. Therefore, high-impedance CMOS
logic inputs connected to
can drift to undetermined voltages.
This presents no problem in most applications since most µP and other circuitry is inoperative with V
CC
below 1V.
Interfacing to µP with Bidirectional RESET Pins
Since the RESET output on the APX803S is open drain, this device interfaces easily with μP/µC that has bidirectional RESET pins, such as the
Motorola 68HC11.
Connecting the μP supervisor’s RESET output directly to the microcontroller’s (μC’s) RESET pin with a single pull-up resistor allows either device
to assert reset.
Supervising and Monitoring Multiple Supplies
Generally, the pull-up resistor connected to the APX803S will connect to the supply voltage that is being monitored at the IC’s V
CC
pin. However,
some systems may use the APX803S open-drain output to level-shift from the monitored supply to reset the µP powered by a different supply
voltage or monitor multiple supplies that will be fed into 1 µC/µP reset input.
