LTC1250
6
1250fb
–
+
C
F
R
IN
1250 F02
LTC1250
R
F
C
P
Input Capacitance and Compensation
The large input transistors create a parasitic 55pF capaci-
tance from each input to V
+
. This input capacitance will
react with the external feedback resistors to form a pole
which can affect amplifier stability. In low gain, high
impedance configurations, the pole can land below the
unity-gain frequency of the feedback network and degrade
phase margin, causing ringing, oscillation, and other
unpleasantness. This is true of any op amp, however, the
55pF capacitance at the LTC1250’s inputs can affect
Input Noise
The LTC1250, like all CMOS amplifiers, exhibits two types
of low frequency noise: thermal noise and 1/f noise. The
LTC1250 uses several design modifications to minimize
these noise sources. Thermal noise is minimized by rais-
ing the g
M
of the front-end transistors by running them at
high bias levels and using large transistor geometries. 1/f
noise is combated by optimizing the zero-drift nulling loop
to run at twice the 1/f corner frequency, allowing it to
reduce the inherently high CMOS 1/f noise to near thermal
levels at low frequencies. The resultant noise spectrum is
quite low at frequencies below the internal 5kHz clock
frequency, approaching the best bipolar op amps at 10Hz
and surpassing them below 1Hz (Figure 1). All this is
accomplished in an industry-standard pinout; the LTC1250
requires no external capacitors, no nulling or clock sig-
nals, and conforms to industry-standard 8-pin DIP and
8-pin SO packages.
U
S
A
O
PP
L
IC
AT
I
WU
U
I FOR ATIO
stability with a feedback network impedance as low as
1.9k. This effect can be eliminated by adding a capacitor
across the feedback resistor, adding a zero which cancels
the input pole (Figure 2). The value of this capacitor should
be:
C
pF
A
F
V
≥
55
where A
V
= closed-loop gain. Note that C
F
is not dependent
on the value of R
F
. Circuits with higher gain (A
V
> 50) or
low loop impedance should not require C
F
for stability.
Figure 2. C
F
Cancels Phase Shift Due to Parasitic C
P
Figure 1. Voltage Noise vs Frequency
FREQUENCY (Hz)
20
VOLTAGE NOISE (nV/√Hz)
30
40
50
80
0.01 1
LTC1250 F01
0
0.1
70
60
10
V
S
= ±5V
R
S
= 10Ω
LTC1250
OP-07
OP-27
Larger values of C
F
, commonly used in band-limited DC
circuits, may actually increase low frequency noise. The
nulling circuitry in the LTC1250 closes a loop that includes
the external feedback network during part of its cycle. This
loop must settle to its final value within 150µs or it will not
fully cancel the 1/f noise spectrum and the low frequency
noise of the part will rise. If the loop is underdamped (large
R
F
, no C
F
) it will ring for more than 150µs and the noise and
offset will suffer.
The solution is to add C
F
as above but beware! Too large
a value of C
F
will overdamp the loop, again preventing it
from reaching a final value by the 150µs deadline. This
condition doesn’t affect the LTC1250’s offset or output
stability, but 1/f noise begins to rise. As a rule of thumb,
the R
F
C
F
feedback pole should be ≥ 7kHz (1/150µs, the
frequency at which the loop settles) for best 1/f perfor-
mance; values between 100pF and 500pF work well with
feedback resistors below 100k. This ensures adequate
gain at 7kHz for the LTC1250 to properly null. High value
feedback resistors (above 1M) may require experimenta-
tion to find the correct value because parasitics, both in the
