LTC1250CS8#TRPBF

LTC1250
7
1250fb
+
LTC1250
47k
R
F
C
F
0.01
1250 F04
+
R
IN
1250 F03
LTC1250
R
F
LTC1250 and on the PC board, play an increasing role.
Low value resistors (below 5k) may not require a capaci-
tor at all.
Input Bias Current
The inputs of the LTC1250, like all zero-drift op amps,
draw only small switching spikes of AC bias current; DC
leakage current is negligible except at very high tempera-
tures. The large front-end transistors cause switching
spikes 3 to 4 times greater than standard zero-drift op
amps: the ±50pA bias current spec is still many times
better than most bipolar parts. The spikes don’t match
from one input pin to the other, and are sometimes (but
not always) of opposite polarity. As a result, matching the
impedances at the inputs (Figure 3) will not cancel the
bias current, and may cause additional errors. Don’t do it.
when the LTC1250’s output is heavily loaded, the chip
may dissipate substantial power, raising the temperature
of the package and aggravating thermocouples at the
inputs. Although the LTC1250 will maintain its specified
accuracy under these conditions, care must be taken in
the layout to prevent or compensate circuit errors. Be
especially careful of air currents when measuring low
frequency noise; nearby moving objects (like people) can
create very large noise peaks with an unshielded circuit
board. For more detailed explanations and advice on how
to avoid these errors, see the LTC1051/LTC1053 data
sheet.
Sampling Behavior
The LTC1250’s zero-drift nulling loop samples the input at
5kHz, allowing it to process signals below 2kHz with no
aliasing. Signals above this frequency may show aliasing
behavior, although wideband internal circuitry generally
keeps errors to a minimum. The output of the LTC1250
will have small spikes at the clock frequency and its
harmonics; these will vary in amplitude with different
feedback configurations. Low frequency or band-limited
systems should not be affected, but systems with higher
bandwidth (oversampling A/Ds, for example) may need to
filter out these clock artifacts. Output spikes can be
minimized with a large feedback capacitor, but this will
adversely affect noise performance (see Input Capaci-
tance and Compensation on the previous page). Applica-
tions which require spike-free output in addition to mini-
mum noise will need a low-pass filter after the LTC1250;
a simple RC will usually do the job (Figure 4). The
LTC1051/LTC1053 data sheet includes more information
about zero-drift amplifier sampling behavior.
Figure 3. Extra Resistor Will
Not
Cancel Bias Current Errors
U
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A
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IC
AT
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Output Drive
The LTC1250 includes an enhanced output stage which
provides nearly symmetrical output source/sink currents.
This output is capable of swinging a minimum of ±4V into
a 1k load with ±5V supplies, and can sink or source >20mA
into low impedance loads. Lightly loaded (R
L
100k), the
LTC1250 will swing to within millivolts of either rail. In
single supply applications, it will typically swing 4.3V into
a 1k load with a 5V supply.
Minimizing External Errors
The input noise, offset voltage, and bias current specs for
the LTC1250 are all well below the levels of circuit board
parasitics. Thermocouples between the copper pins of the
LTC1250 and the tin/lead solder used to connect them can
overwhelm the offset voltage of the LTC1250, especially
if a soldering iron has been around recently. Note also that
Figure 4. RC Output Pole Limits Bandwidth to 330Hz
LTC1250
8
1250fb
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S
A
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Single Supply Operation
The LTC1250 will operate with single supply voltages as
low as 4.5V, and the output swings to within millivolts of
either supply when lightly loaded. The input stage will
common mode to within 250mV of ground with a single
5V supply, and will common mode to ground with single
supplies above 11V. Most bridge transducers bias their
inputs above ground when powered from single supplies,
allowing them to interface directly to the LTC1250 in
single supply applications. Single-ended, ground-refer-
enced signals will need to be level shifted slightly to
interface to the LTC1250’s inputs.
Fault Conditions
The LTC1250 is designed to withstand most external fault
conditions without latch-up or damage. However, unusu-
ally severe fault conditions can destroy the part. All pins
are protected against faults of ±25mA or 5V beyond
either supply, whichever comes first. If the external
circuitry can exceed these limits, series resistors or
voltage clamp diodes should be included to prevent
damage.
The LTC1250 includes internal protection against ESD
damage. All data sheet parameters are maintained to 1kV
ESD on any pin; beyond 1kV, the input bias and offset
currents will increase, but the remaining specs are unaf-
fected and the part remains functional to 5kV at the input
pins and 8kV at the output pin. Extreme ESD conditions
should be guarded against by using standard antistatic
precautions.
LTC1250
9
1250fb
J8 0694
0.014 – 0.026
(0.360 – 0.660)
0.200
(5.080)
MAX
0.015 – 0.060
(0.381 – 1.524)
0.125
3.175
MIN
0.100 ± 0.010
(2.540 ± 0.254)
0.300 BSC
(0.762 BSC)
0.008 – 0.018
(0.203 – 0.457)
0° – 15°
0.385 ± 0.025
(9.779 ± 0.635)
0.005
(0.127)
MIN
0.405
(10.287)
MAX
0.220 – 0.310
(5.588 – 7.874)
12
3
4
87
65
0.025
(0.635)
RAD TYP
0.045 – 0.068
(1.143 – 1.727)
FULL LEAD
OPTION
0.023 – 0.045
(0.584 – 1.143)
HALF LEAD
OPTION
CORNER LEADS OPTION
(4 PLCS)
0.045 – 0.068
(1.143 – 1.727)
NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE OR TIN PLATE LEADS.
PACKAGE DESCRIPTIO
U
J8 Package
8-Lead CERDIP (Narrow .300 Inch, Hermetic)
(Reference LTC DWG # 05-08-1110)
OBSOLETE PACKAGE

LTC1250CS8#TRPBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Precision Amplifiers Very L N Zero-Drift Bridge Amp
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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