Monolithic 16-Bit
Serial/Byte DACPORT
AD660
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ©1993–2008 Analog Devices, Inc. All rights reserved.
FEATURES
Complete 16-bit digital-to-analog function
On-chip output amplifier
On-chip buried Zener voltage reference
±1 LSB integral linearity
15-bit monotonic over temperature
Microprocessor compatible
Serial or byte input
Double-buffered latches
Fast (40 ns) write pulse
Asynchronous clear (to 0 V) function
Serial output pin facilitates daisy-chaining
Unipolar or bipolar output
Low glitch: 15 nV-s
Low THD + N: 0.009%
FUNCTIONAL BLOCK DIAGRAM
HBE
CONTROL
LOGIC
SER
CLR
LDAC
REF IN
10kΩ
10kΩ
10.05kΩ
REF OUT
CS
DB7/
DB15
AD660
S
OUT
V
OUT
AGND
SPAN/
BIPOLAR
OFFSET
DGND
–V
EE
+V
CC
+V
LL
10V REF
16-BIT LATCH
16-BIT DAC
16-BIT LATCH
16
17
18
19
23
24
20
21
22
13
5
1 2 3 4
121415
01813-001
DB1/DB9/
DATADIR
11
LBE/
CLEAR SELECT
DB0/
DB8/
SIN
Figure 1.
GENERAL DESCRIPTION
The AD660 DACPORT® is a complete 16-bit monolithic digital-
to-analog converter with an on-board voltage reference, double-
buffered latches, and an output amplifier. It is manufactured on
the Analog Devices, Inc., BiMOS II process. This process allows
the fabrication of low power CMOS logic functions on the same
chip as high precision bipolar linear circuitry.
The AD660 architecture ensures 15-bit monotonicity over time
and temperature. Integral and differential nonlinearity is main-
tained at ±0.003% maximum. The on-chip output amplifier
provides a voltage output settling time of 10 μs to within ½ LSB for
a full-scale step.
The AD660 has an extremely flexible digital interface. Data can
be loaded into the AD660 in serial mode or as two 8-bit bytes.
This is made possible by two digital input pins that have dual
functions. The serial mode input format is pin selectable to be
MSB or LSB first. The serial output pin allows the user to daisy-
chain several AD660 devices by shifting the data through the
input latch into the next DAC, thus minimizing the number of
control lines required to SIN,
CS
and LDAC. The byte mode input
format is also flexible in that the high byte or low byte data can
be loaded first. The double buffered latch structure eliminates
data skew errors and provides for simultaneous updating of DACs
in a multiDAC system.
The AD660 is available in five grades. AN and BN versions are
specified from −40°C to +85°C and are packaged in a 24-lead
300 mil plastic DIP. AR and BR versions are also specified from
−40°C to +85°C and are packaged in a 24-lead SOIC. The SQ
version is packaged in a 24-lead 300 mil CERDIP package and
is also available compliant to MIL-STD-883. Refer to the
AD660SQ/883B military data sheet for specifications and test
conditions.
PRODUCT HIGHLIGHTS
1. The AD660 is a complete 16-bit DAC, with a voltage
reference, double-buffered latches, and an output amplifier
on a single chip.
2. The internal buried Zener reference is laser trimmed to
10.000 V with a ±0.1% maximum error and a temperature
drift performance of ±15 ppm/°C. The reference is available
for external applications.
3. The output range of the AD660 is pin programmable and
can be set to provide a unipolar output range of 0 V to 10 V
or a bipolar output range of −10 V to +10 V. No external
components are required.
4. The AD660 is both dc and ac specified. DC specifications
include ±1 LSB INL and ±1 LSB DNL errors. AC specifica-
tions include 0.009% THD + N and 83 dB SNR.
5. The double-buffered latches on the AD660 eliminate data
skew errors and allow simultaneous updating of DACs in
multiDAC applications.
6. The clear function can asynchronously set the output
to 0 V regardless of whether the DAC is in unipolar or
bipolar mode.
7. The output amplifier settles within 10 μs to ±½ LSB for a
full-scale step and within 2.5 μs for a 1 LSB step over tempera-
ture. The output glitch is typically 15 nV-s when a full-scale
step is loaded.
