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CBT3245APW-Q100J

P1-P3P4-P6P7-P9P10-P12P13-P15
CBT3245A_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 1 — 20 March 2013 3 of 14
NXP Semiconductors CBT3245A-Q100
Octal bus switch
5.2 Pin description
6. Functional description
[1] H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state.
7. Limiting values
[1] Stresses beyond the listed ones, may permanently damage the device. The ratings are stress ratings only and functional operation of
the device at or beyond any conditions, other than those conditions indicated in Section 8.
, is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
[2] The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
Table 2. Pin description
Symbol Pin Description
n.c. 1 not connected
A1 to A8 2, 3, 4, 5, 6, 7, 8, 9 data input/output (A port)
GND 10 ground (0 V)
B1 to B8 18, 17, 16, 15, 14, 13, 12, 11 data input/output (B port)
OE
19 output enable input (active LOW)
V
CC
20 positive supply voltage
Table 3. Function selection
[1]
Input Input/output
OE An, Bn
LAn = Bn
HZ
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
[1]
T
amb
=
40
C to +85
C, unless otherwise specified.
Symbol Parameter Conditions Min Max Unit
V
CC
supply voltage 0.5 +7.0 V
V
I
input voltage
[2]
0.5 +7.0 V
I
OK
output clamping current V
O
<0V 50 - mA
V
O
output voltage
[2]
0.5 +7.0 V
I
O
output current V
O
<0V - 128 mA
I
IK
input clamping current V
I
=0V 50 - mA
T
stg
storage temperature 65 +150 C
CBT3245A_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 1 — 20 March 2013 4 of 14
NXP Semiconductors CBT3245A-Q100
Octal bus switch
8. Recommended operating conditions
9. Static characteristics
[1] All typical values are at V
CC
=5V, T
amb
=25C.
[2] This is the increase in supply current for each input that is at the specified TTL voltage level rather than V
CC
or GND.
[3] Measured by the voltage drop between the An and the Bn terminals at the indicated current through the switch. The lowest voltage of
the two (An or Bn) terminals, determines ON resistance.
Table 5. Operating conditions
All unused control inputs of the device must be held at V
CC
or GND to ensure proper device operation.
Symbol Parameter Conditions Min Typ Max Unit
V
CC
supply voltage 4.0 - 5.5 V
V
IH
HIGH-level input voltage 2.0 - - V
V
IL
LOW-level input voltage - - 0.8 V
T
amb
ambient temperature operating in free air 40 - +85 C
Table 6. Static characteristics
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions T
amb
= 40 C to +85 C Unit
Min Typ
[1]
Max
V
IK
input clamping voltage V
CC
=4.5V; I
I
= 18 mA - - 1.2 V
I
I
input leakage current V
CC
=5.5V; V
I
= GND or 5.5 V - - 5 A
I
CC
supply current V
CC
=5.5V; I
O
=0mA;
V
I
=V
CC
or GND
-13A
I
CC
additional supply current per input pin; V
CC
= 5.5 V; 1 input at
3.4 V, other inputs at V
CC
or GND
[2]
--3.5mA
C
I
input capacitance control pins; V
I
=3V or 0V - 3.2 - pF
C
io(off)
off-state input/output
capacitance
port off; V
I
= 3 V or 0 V; OE =V
CC
-6.6-pF
R
ON
ON resistance V
CC
=4.5V; V
I
=0V; I
I
=64mA
[3]
-57
V
CC
=4.5V; V
I
=0V; I
I
=30mA
[3]
-57
V
CC
=4.5V; V
I
=2.4V; I
I
= 15 mA
[3]
-1015
CBT3245A_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 1 — 20 March 2013 5 of 14
NXP Semiconductors CBT3245A-Q100
Octal bus switch
10. Dynamic characteristics
[1] The propagation delay is the calculated RC time constant of the typical ON resistance of the switch and the specified load capacitance,
when driven by an ideal voltage source (zero output impedance).
[2] t
pd
is the same as t
PLH
and t
PHL
.
t
en
is the same as t
PZL
and t
PZH
.
t
dis
is the same as t
PLZ
and t
PHZ
.
11. Waveforms
Table 7. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 6.
Symbol Parameter Conditions T
amb
= 40 C to +85 C Unit
Min Max
t
pd
propagation delay An, Bn to Bn, An; see Figure 4
[1][2]
V
CC
= 5.0 V 0.5 V - 0.25 ns
t
en
enable time OE to An or Bn; see Figure 5
[2]
V
CC
= 5.0 V 0.5 V 1.0 5.9 ns
t
dis
disable time OE to An or Bn; see Figure 5
[2]
V
CC
= 5.0 V 0.5 V 1.0 6.0 ns
Measurement points are given in Table 8.
Logic levels: V
OL
and V
OH
are typical output voltage levels that occur with the output load.
Fig 4. The data input (An, Bn) to output (Bn, An) propagation delay times
001aam475
An, Bn input
Bn, An output
GND
V
OH
V
M
t
PLH
t
PHL
V
M
V
OL
V
I
P1-P3P4-P6P7-P9P10-P12P13-P15

CBT3245APW-Q100J

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Buy CBT3245APW-Q100J
Manufacturer:
Nexperia
Description:
Digital Bus Switch ICs CBT3245APW-Q100/TSSOP20/REEL 1
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New from this manufacturer.
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