Data Sheet ADA4431-1
Rev. A | Page 5 of 12
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Rating
Supply Voltage 4.0 V
Storage Temperature Range –65°C to +125°C
Operating Temperature Range –40°C to +85°C
Lead Temperature (Soldering 10 sec) 300°C
Junction Temperature 150°C
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
THERMAL RESISTANCE
θ
JA
is specified for the device (including exposed pad) soldered
to a high thermal conductivity 2s2p circuit board, as described
in EIA/JESD 51-7. The exposed pad is not electrically connected to
the device. It is typically soldered to a pad on the PCB that is
thermally and electrically connected to an internal ground plane.
Table 4. Thermal Resistance
Package Type θ
JA
Unit
16-lead LFCSP-UQ (CP-16-12) 43 °C/W
MAXIMUM POWER DISSIPATION
The maximum safe power dissipation in the ADA4431-1
package is limited by the associated rise in junction temperature
(T
J
) on the die. At approximately 150°C, which is the glass
transition temperature, the plastic changes its properties. Even
temporarily exceeding this temperature limit can change the
stresses that the package exerts on the die, permanently shifting
the parametric performance of the ADA4431-1. Exceeding a
junction temperature of 150°C for an extended period can result in
changes in the silicon devices potentially causing failure.
The power dissipated in the package (P
D
) is the sum of the
quiescent power dissipation and the power dissipated in the
package due to the load drive. The quiescent power is the voltage
between the supply pins (V
S
) times the quiescent current (I
S
).
The power dissipated due to the load drive depends upon the
particular application. The power due to load drive is calculated
by multiplying the load current by the associated voltage drop
across the device. RMS voltages and currents must be used in
these calculations.
Airflow increases heat dissipation, effectively reducing θ
JA
. In
addition, more metal directly in contact with the package leads
and exposed pad from metal traces, through-holes, ground, and
power planes reduces the θ
JA
.
Figure 3 shows the maximum safe power dissipation in the
package vs. the ambient temperature for the 16-lead LFCSP
package (43°C/W) on a JEDEC standard 4-layer board.
06743-003
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
MAXIMUM POWER DISSIPATION (W)
–40 –30 –20 –10 0 10 20 30 40 50
60 70
80
90 100
AMBIENT TEMPERATURE (°C)
Figure 3. Maximum Power Dissipation vs. Temperature for a 4-Layer Board
ESD CAUTION
