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CD4093BCN

P1-P3P4-P6P7-P8
www.fairchildsemi.com 4
CD4093BC
Typical Applications
Gated Oscillator
Assume t
1
+ t
2
>> t
PHL
+ t
PLH
then:
t
0
= RC ln [V
DD
/V
T
−]
t
1
= RC ln [(V
DD
− V
T
−)/(V
DD
− V
T
+)]
t
2
= RC ln [V
T
+/V
T
−]
Gated One-Shot
(a) Negative-Edge Triggered
(b) Positive-Edge Triggered
5 www.fairchildsemi.com
CD4093BC
Typical Performance Characteristics
Typical Transfer
Characteristics
Guaranteed Hysteresis vs V
DD
Guaranteed Trigger Threshold
Voltage vs V
DD
Guaranteed Hysteresis vs V
DD
Input and Output Characteristics
V
NML
= V
IH(MIN)
− V
OL
≅ V
IH(MIN)
= V
T
+
(MIN)
V
NMH
= V
OH
− V
IL(MAX)
≅ V
DD
− V
IL(MAX)
= V
DD
− V
T
−
(MAX)
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CD4093BC
AC Test Circuits and Switching Time Waveforms
P1-P3P4-P6P7-P8

CD4093BCN

Mfr. #:
Buy CD4093BCN
Manufacturer:
ON Semiconductor / Fairchild
Description:
Logic Gates Qd 2-Inp NAND Sc Trg
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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