LT1964
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PIN FUNCTIONS
ADJ (Adjustable Devices only): For the Adjustable LT1964,
this is the Input to the Error Amplifi er. The ADJ pin has a
bias current of 30nA that fl ows out of the pin. The ADJ pin
voltage is –1.22V referenced to ground, and the output
voltage range is –1.22V to –20V. A parasitic diode exists
between the ADJ pin and the input of the LT1964. The ADJ
pin cannot be pulled more negative than the input during
normal operation, or more than 0.5V more negative than
the input during a fault condition.
BYP: The BYP Pin is used to Bypass the Reference of
the LT1964 to Achieve Low Noise Performance from the
Regulator. A small capacitor from the output to this pin
will bypass the reference to lower the output voltage noise.
A maximum value of 0.01μF can be used for reducing
output voltage noise to a typical 30μV
RMS
over a 10Hz
to 100kHz bandwidth. If not used, this pin must be left
unconnected.
Exposed Pad (DFN Package Only): IN. Connect to IN
(Pins 7, 8) at the PCB.
GND: Ground.
IN: Power is Supplied to the Device Through the Input Pin.
A bypass capacitor is required on this pin if the device
is more than six inches away from the main input fi lter
capacitor. In general, the output impedance of a battery
rises with frequency, so it is advisable to include a bypass
capacitor in battery-powered circuits. A bypass capacitor
in the range of 1μF to 10μF is suffi cient.
OUT: The Output Supplies Power to the Load. A minimum
output capacitor of 1μF is required to prevent oscillations.
Larger output capacitors will be required for applications
with large transient loads to limit peak voltage transients.
A parasitic diode exists between the output and the input.
The output cannot be pulled more negative than the input
during normal operation, or more than 0.5V below the input
during a fault condition. See the Applications Information
section for more information on output capacitance and
reverse output characteristics.
SHDN: The SHDN Pin is used to put the LT1964 into a Low
Power Shutdown State. The SHDN pin is referenced to
the GND pin for regulator control, allowing the LT1964 to
be driven by either positive or negative logic. The output
of the LT1964 will be off when the SHDN pin is pulled
within ±0.8V of GND. Pulling the SHDN pin more than
–1.9V or +1.6V will turn the LT1964 on. The SHDN pin
can be driven by 5V logic or open collector logic with a
pull-up resistor. The pull-up resistor is required to supply
the pull-up current of the open collector gate, normally
several microamperes, and the SHDN pin current, typi-
cally 3μA out of the pin (for negative logic) or 6μA into
the pin (for positive logic). If unused, the SHDN pin must
be connected to V
IN
. The device will be shut down if the
SHDN pin is open circuit. For the LT1964-BYP, the SHDN
pin is internally connected to V
IN
. A parasitic diode exists
between the SHDN pin and the input of the LT1964. The
SHDN pin cannot be pulled more negative than the input
during normal operation, or more than 0.5V below the
input during a fault condition.
LT1964
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APPLICATIONS INFORMATION
Figure 1. Adjustable Operation
The LT1964 is a 200mA negative low dropout regulator with
micropower quiescent current and shutdown. The device
is capable of supplying 200mA at a dropout voltage of
340mV. Output voltage noise can be lowered to 30μV
RMS
over a 10Hz to 100kHz bandwidth with the addition of a
0.01μF reference bypass capacitor. Additionally, the refer-
ence bypass capacitor will improve transient response of
the regulator, lowering the settling time for transient load
conditions. The low operating quiescent current (30μA)
drops to 3μA in shutdown. In addition to the low quies-
cent current, the LT1964 incorporates several protection
features which make it ideal for use in battery-powered
systems. In dual supply applications where the regulator
load is returned to a positive supply, the output can be
pulled above ground by as much as 20V and still allow
the device to start and operate.
Adjustable Operation
The adjustable version of the LT1964 has an output volt-
age range of –1.22V to –20V. The output voltage is set by
the ratio of two external resistors as shown in Figure 1.
The device servos the output to maintain the voltage at
the ADJ pin at –1.22V referenced to ground. The current
in R1 is then equal to –1.22V/R1 and the current in R2 is
the current in R1 plus the ADJ pin bias current. The ADJ
pin bias current, 30nA at 25°C, fl ows through R2 out of
the ADJ pin. The output voltage can be calculated using
the formula in Figure 1. The value of R1 should be less
than 250k to minimize errors in the output voltage caused
by the ADJ pin bias current. Note that in shutdown the
output is turned off and the divider current will be zero.
Curves of ADJ Pin Voltage vs Temperature and ADJ Pin Bias
Current vs Temperature appear in the Typical Performance
Characteristics section.
The adjustable device is tested and specifi ed with the ADJ
pin tied to the OUT pin and a 5μA DC load (unless otherwise
specifi ed) for an output voltage of –1.22V. Specifi cations
for output voltages greater than –1.22V will be propor-
tional to the ratio of the desired output voltage to –1.22V;
(V
OUT
/ –1.22V). For example, load regulation for an output
current change of 1mA to 200mA is 2mV typical at V
OUT
=
–1.22V. At V
OUT
= –12V, load regulation is:
(–12V/–1.22V) • (2mV) = 19.6mV
Bypass Capacitance and Low Noise Performance
The LT1964 may be used with the addition of a bypass
capacitor from V
OUT
to the BYP pin to lower output voltage
noise. A good quality low leakage capacitor is recom-
mended. This capacitor will bypass the reference of the
LT1964, providing a low frequency noise pole. The noise
pole provided by this bypass capacitor will lower the out-
put voltage noise to as low as 30μV
RMS
with the addition
of a 0.01μF bypass capacitor. Using a bypass capacitor
has the added benefi t of improving transient response.
With no bypass capacitor and a 10μF output capacitor, a
–10mA to –200mA load step will settle to within 1% of
its fi nal value in less than 100μs. With the addition of a
0.01μF bypass capacitor, the output will stay within 1%
for the same –10mA to –200mA load step (see LT1964-5
Transient Response in the Typical Characteristics section).
However, regulator start-up time is proportional to the size
of the bypass capacitor.
Higher values of output voltage noise may be measured
if care is not exercised with regard to circuit layout and
testing. Crosstalk from nearby traces can induce unwanted
noise onto the output of the LT1964-X.
1964 F01
GND
ADJ
IN
OUT
LT1964
V
IN
V
OUT
+
R1
R2
V
OUT
= –1.22V(1 + ) – (I
ADJ
)(R2)
V
ADJ
= –1.22V
I
ADJ
= 30nA AT 25°C
OUTPUT RANGE = –1.22V TO –20V
R2
R1
LT1964
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APPLICATIONS INFORMATION
Output Capacitance and Transient Response
The LT1964 is designed to be stable with a wide range
of output capacitors. The ESR of the output capacitor
affects stability, most notably with small capacitors. A
minimum output capacitor of 1μF with an ESR of 3Ω or
less is recommended to prevent oscillations. The LT1964
is a micropower device and output transient response
will be a function of output capacitance. Larger values
of output capacitance decrease the peak deviations and
provide improved transient response for larger load current
changes. Bypass capacitors, used to decouple individual
components powered by the LT1964, will increase the
effective output capacitor value.
Extra consideration must be given to the use of ceramic
capacitors. Ceramic capacitors are manufactured with a
variety of dielectrics, each with different behavior across
temperature and applied voltage. The most common
dielectrics used are specifi ed with EIA temperature char-
acteristic codes of Z5U, Y5V, X5R and X7R. The Z5U and
Y5V dielectrics are good for providing high capacitances
in a small package, but they tend to have strong voltage
and temperature coeffi cients as shown in Figures 2 and 3.
When used with a 5V regulator, a 16V 10μF Y5V capacitor
can exhibit an effective value as low as 1μF to 2μF for the
DC bias voltage applied and over the operating tempera-
ture range. The X5R and X7R dielectrics result in more
stable characteristics and are more suitable for use as the
output capacitor. The X7R type has better stability across
temperature, while the X5R is less expensive and is avail-
able in higher values. Care still must be exercised when
using X5R and X7R capacitors; the X5R and X7R codes
only specify operating temperature range and maximum
capacitance change over temperature. Capacitance change
due to DC bias with X5R and X7R capacitors is better than
Y5V and Z5U capacitors, but can still be signifi cant enough
to drop capacitor values below appropriate levels. Capaci-
tor DC bias characteristics tend to improve as component
case size increases, but expected capacitance at operating
voltage should be verifi ed.
Figure 2. Ceramic Capacitor DC Bias Characteristics
Figure 3. Ceramic Capacitor Temperature Characteristics
DC BIAS VOLTAGE (V)
CHANGE IN VALUE (%)
1964 F02
20
0
–20
–40
–60
–80
–100
0
4
8
10
26
12
14
X5R
Y5V
16
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10μF
TEMPERATURE (°C)
–50
40
20
0
–20
–40
–60
–80
–100
25 75
1964 F03
–25 0
50 100 125
Y5V
CHANGE IN VALUE (%)
X5R
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10μF
Voltage and temperature coeffi cients are not the only
sources of problems. Some ceramic capacitors have a
piezoelectric response. A piezoelectric device generates
voltage across its terminals due to mechanical stress,
similar to the way a piezoelectric accelerometer or micro-
phone works. For a ceramic capacitor the stress can be
induced by vibrations in the system or thermal transients.
The resulting voltages produced can cause appreciable

LT1964IDD#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
LDO Voltage Regulators 200mA, Low Noise, Low Dropout Negative, Micropower Regulator in SOT-23
Lifecycle:
New from this manufacturer.
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