LT1964
13
1964fb
APPLICATIONS INFORMATION
amounts of noise, especially when a ceramic capacitor is
used for noise bypassing. A ceramic capacitor produced
Figure 4’s trace in response to light tapping from a pencil.
Similar vibration induced behavior can masquerade as
increased output voltage noise.
For surface mount devices, heat sinking is accomplished
by using the heat spreading capabilities of the PC board
and its copper traces. Copper board stiffeners and plated
through-holes can also be used to spread the heat gener-
ated by power devices.
The following tables list thermal resistance for several
different board sizes and copper areas. All measurements
were taken in still air on 3/32" FR-4 board with one ounce
copper.
Table 1. SOT-23 Thermal Resistance
COPPER AREA
BOARD AREA
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)TOPSIDE* BACKSIDE
2500mm
2
2500mm
2
2500mm
2
125°C/W
1000mm
2
2500mm
2
2500mm
2
125°C/W
225mm
2
2500mm
2
2500mm
2
130°C/W
100mm
2
2500mm
2
2500mm
2
135°C/W
50mm
2
2500mm
2
2500mm
2
150°C/W
*Device is mounted on topside.
Table 2. DFN Thermal Resistance
COPPER AREA
BOARD AREA
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)TOPSIDE* BACKSIDE
2500mm
2
2500mm
2
2500mm
2
40°C/W
1000mm
2
2500mm
2
2500mm
2
45°C/W
225mm
2
2500mm
2
2500mm
2
50°C/W
100mm
2
2500mm
2
2500mm
2
62°C/W
*Device is mounted on topside.
The thermal resistance junction-to-case
JC
), measured
at Pin 2, is 60°C/W. for the SOT-23 package and is 16°C/W
measured at the backside of the exposed pad on the DFN
package
Calculating Junction Temperature
Example: Given an output voltage of –5V, an input voltage
range of –6V to –8V, an output current range of 0mA to
–100mA, and a maximum ambient temperature of 50°C,
what will the maximum junction temperature be?
The power dissipated by the device will be equal to:
Figure 4. Noise Resulting from Tapping on a Ceramic Capacitor
LT1964-5
C
OUT
= 10μF
C
BYP
= 0.01μF
I
LOAD
= –200mA
V
OUT
1mV/DIV
100ms/DIV
1964 F04
Thermal Considerations
The power handling capability of the device will be limited
by the maximum rated junction temperature (125°C). The
power dissipated by the device will be made up of two
components:
1. Output current multiplied by the input/output voltage
differential: I
OUT
• (V
IN
– V
OUT
), and
2. Ground pin current multiplied by the input voltage:
I
GND
• V
IN
The GND pin current can be found by examining the GND
Pin Current curves in the Typical Performance Character-
istics. Power dissipation will be equal to the sum of the
two components listed above.
The LT1964 series regulators have internal thermal limiting
designed to protect the device during overload conditions.
For continuous normal conditions the maximum junction
temperature rating of 125°C must not be exceeded. It is
important to give careful consideration to all sources of
thermal resistance from junction to ambient. Additional
heat sources mounted nearby must also be considered.
LT1964
14
1964fb
I
OUT(MAX)
• (V
IN(MAX)
– V
OUT
) + (I
GND
• V
IN(MAX)
)
where,
I
OUT(MAX)
= –100mA
V
IN(MAX)
= –8V
I
GND
at (I
OUT
= –100mA, V
IN
= –8V) = –2mA
so,
P = –100mA • (–8V + 5V) + (–2mA • –8V) = 0.32W
The thermal resistance (junction to ambient) will be in the
range of 125°C/W to 150°C/W for the SOT-23 package
depending on the copper area. So the junction temperature
rise above ambient will be approximately equal to:
0.32W • 140°C/W = 44.2°C
The maximum junction temperature will then be equal to
the maximum junction temperature rise above ambient
plus the maximum ambient temperature or:
T
JMAX
= 50°C + 44.2°C = 94.2°C
Protection Features
The LT1964 incorporates several protection features
which make it ideal for use in battery-powered circuits.
In addition to the normal protection features associated
with monolithic regulators, such as current limiting and
thermal limiting, the device is protected against reverse
input voltages and reverse output voltages.
Current limit protection and thermal overload protection
are intended to protect the device against current overload
conditions at the output of the device. For normal operation,
the junction temperature should not exceed 125°C.
The output of the LT1964 can be pulled above ground
without damaging the device. If the input is left open circuit
or grounded, the output can be pulled above ground by
20V. For fi xed voltage versions, the output will act like a
large resistor, typically 500k or higher, limiting current fl ow
to less than 40μA. For adjustable versions, the output will
APPLICATIONS INFORMATION
act like an open circuit, no current will fl ow into the pin.
If the input is powered by a voltage source, the output
will sink the short-circuit current of the device and will
protect itself by thermal limiting. In this case, grounding
the SHDN pin will turn off the device and stop the output
from sinking the short-circuit current.
Like many IC power regulators, the LT1964 series have
safe operating area protection. The safe area protection
activates at input-to-output differential voltages greater
than –7V. The safe area protection decreases the current
limit as the input-to-output differential voltage increases
and keeps the power transistor inside a safe operating
region for all values of forward input to-output voltage.
The protection is designed to provide some output current
at all values of input-to-output voltage up to the device
breakdown. A 50μA load is required at input-to-output
differential voltages greater than –7V.
When power is fi rst turned on, as the input voltage rises,
the output follows the input, allowing the regulator to start
up into very heavy loads. During start-up, as the input
voltage is rising, the input-to-output voltage differential
is small, allowing the regulator to supply large output
currents. With a high input voltage, a problem can occur
wherein removal of an output short will not allow the
output voltage to fully recover. Other regulators, such as
the LT1175, also exhibit this phenomenon, so it is not
unique to the LT1964 series.
The problem occurs with a heavy output load when
the input voltage is high and the output voltage is low.
Common situations are immediately after the removal of
a short-circuit or when the SHDN pin is pulled high after
the input voltage has already been turned on. The load line
for such a load may intersect the output current curve at
two points. If this happens, there are two stable operat-
ing points for the regulator. With this double intersection,
the input supply may need to be cycled down to zero and
brought up again to make the output recover.
LT1964
15
1964fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
PACKAGE DESCRIPTION
1.50 – 1.75
(NOTE 4)
2.80 BSC
0.30 – 0.45 TYP
5 PLCS (NOTE 3)
DATUM ‘A’
0.09 – 0.20
(NOTE 3)
S5 TSOT-23 0302 REV B
PIN ONE
2.90 BSC
(NOTE 4)
0.95 BSC
1.90 BSC
0.80 – 0.90
1.00 MAX
0.01 – 0.10
0.20 BSC
0.30 – 0.50 REF
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
3.85 MAX
0.62
MAX
0.95
REF
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
1.4 MIN
2.62 REF
1.22 REF
S5 Package
5-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1635)
DD Package
8-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1698)
3.00 ±0.10
(4 SIDES)
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON TOP AND BOTTOM OF PACKAGE
0.38 ± 0.10
BOTTOM VIEW—EXPOSED PAD
1.65 ± 0.10
(2 SIDES)
0.75 ±0.05
R = 0.115
TYP
2.38 ±0.10
(2 SIDES)
14
85
PIN 1
TOP MARK
(NOTE 6)
0.200 REF
0.00 – 0.05
(DD) DFN 1203
0.25 ± 0.05
2.38 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
1.65 ±0.05
(2 SIDES)2.15 ±0.05
0.50
BSC
0.675 ±0.05
3.5 ±0.05
PACKAGE
OUTLINE
0.25 ± 0.05
0.50 BSC

LT1964IS5-SD#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
LDO Voltage Regulators 200mA Low Noise Negative LDO
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union