P89LPC9408_1 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 01 — 16 December 2005 46 of 69
Philips Semiconductors
P89LPC9408
8-bit two-clock 80C51 core with 32 segment × 4 LCD driver, 10-bit ADC
An additional feature allows an arbitrary selection of LCD segments to be blinked in the
static and 1:2 drive modes. This is implemented without any communication overheads by
the output bank selector which alternates the displayed data between the data in the
display RAM bank and the data in an alternative RAM bank at the blink frequency. This
mode can also be implemented by the BLINK command.
The entire display can be blinked at a frequency other than the nominal blink frequency by
sequentially resetting and setting the display enable bit E at the required rate using the
MODE SET command.
Blink modes 0.5 Hz, 1 Hz and 2 Hz, and nominal blink frequencies 0.5 Hz, 1 Hz and 2 Hz
correspond to an oscillator frequency (f
osc(LCD)
) of 1536 Hz at pin CLK. The oscillator
frequency range is 397 Hz to 3046 Hz.
7.27.13.1 I
2
C-bus controller
The LCD controller acts as an I
2
C-bus slave receiver. In the P89LPC9408 the hardware
subaddress inputs A0, A,1 and A2 are tied to V
SS
setting the hardware subaddress = 0.
7.27.14 Input filters
To enhance noise immunity in electrically adverse environments, RC low-pass filters are
provided on the SDA and SCL lines.
7.27.15 I
2
C-bus slave addresses
The I
2
C-bus slave address is 0111 0000. The LCD controller is a write-only device and will
not respond to a read access.
7.28 Data EEPROM
The P89LPC9408 has 512 bytes of on-chip Data EEPROM. The Data EEPROM is SFR
based, byte readable, byte writable, and erasable (via row fill and sector fill). The user can
read, write and fill the memory via SFRs and one interrupt. This Data EEPROM provides
100,000 minimum erase/program cycles for each byte.
Byte Mode: In this mode, data can be read and written one byte at a time.
Row Fill: In this mode, the addressed row (64 bytes) is filled with a single value. The
entire row can be erased by writing 00H.
Sector Fill: In this mode, all 512 bytes are filled with a single value. The entire sector
can be erased by writing 00H.
After the operation finishes, the hardware will set the EEIF bit, which if enabled will
generate an interrupt. The flag is cleared by software.
Table 9: Blinking frequencies
Blink mode Normal operating mode ratio Normal Blink frequency
Off - Blinking off
2Hz f
osc(LCD)
/768 2 Hz
1Hz f
osc(LCD)
/1536 1 Hz
0.5 Hz f
osc(LCD)
/3072 0.5 Hz
P89LPC9408_1 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 01 — 16 December 2005 47 of 69
Philips Semiconductors
P89LPC9408
8-bit two-clock 80C51 core with 32 segment × 4 LCD driver, 10-bit ADC
7.29 Flash program memory
7.29.1 General description
The P89LPC9408 flash memory provides in-circuit electrical erasure and programming.
The flash can be erased, read, and written as bytes. The Sector and Page Erase functions
can erase any flash sector (1 kB) or page (64 bytes). The Chip Erase operation will erase
the entire program memory. ICP using standard commercial programmers is available. In
addition, IAP and byte-erase allows code memory to be used for non-volatile data storage.
On-chip erase and write timing generation contribute to a user-friendly programming
interface. The P89LPC9408 flash reliably stores memory contents even after
100,000 erase and program cycles. The cell is designed to optimize the erase and
programming mechanisms. The P89LPC9408 uses V
DD
as the supply voltage to perform
the Program/Erase algorithms.
7.29.2 Features
Programming and erase over the full operating voltage range.
Byte erase allows code memory to be used for data storage.
Read/Programming/Erase using ISP/IAP/ICP.
Internal fixed boot ROM, containing low-level IAP routines available to user code.
Default loader providing ISP via the serial port, located in upper end of user program
memory.
Boot vector allows user-provided flash loader code to reside anywhere in the flash
memory space, providing flexibility to the user.
Any flash program or erase operation in 2 ms.
Programming with industry-standard commercial programmers.
Programmable security for the code in the flash for each sector.
100,000 typical erase/program cycles for each byte.
10 year minimum data retention.
7.29.3 Flash organization
The program memory consists of eight 1 kB sectors on the P89LPC9408 device. Each
sector can be further divided into 64-byte pages. In addition to sector erase, page erase,
and byte erase, a 64-byte page register is included which allows from 1 to 64 bytes of a
given page to be programmed at the same time, substantially reducing overall
programming time.
7.29.4 Using flash as data storage
The flash code memory array of this device supports individual byte erasing and
programming. Any byte in the code memory array may be read using the MOVC
instruction, provided that the sector containing the byte has not been secured (a MOVC
instruction is not allowed to read code memory contents of a secured sector). Thus any
byte in a non-secured sector may be used for non-volatile data storage.
P89LPC9408_1 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 01 — 16 December 2005 48 of 69
Philips Semiconductors
P89LPC9408
8-bit two-clock 80C51 core with 32 segment × 4 LCD driver, 10-bit ADC
7.29.5 Flash programming and erasing
Four different methods of erasing or programming of the flash are available. The flash may
be programmed or erased in the end-user application (IAP) under control of the
application’s firmware. Another option is to use the ICP mechanism. This ICP system
provides for programming through a serial clock - serial data interface. As shipped from
the factory, the upper 512 bytes of user code space contains a serial ISP routine allowing
for the device to be programmed in circuit through the serial port. The flash may also be
programmed or erased using a commercially available EPROM programmer which
supports this device. This device does not provide for direct verification of code memory
contents. Instead, this device provides a 32-bit CRC result on either a sector or the entire
user code space.
7.29.6 In-Circuit Programming
In-Circuit Programming is performed without removing the microcontroller from the
system. The ICP facility consists of internal hardware resources to facilitate remote
programming of the P89LPC9408 through a two-wire serial interface. The Philips ICP
facility has made ICP in an embedded application—using commercially available
programmers—possible with a minimum of additional expense in components and circuit
board area. The ICP function uses five pins. Only a small connector needs to be available
to interface your application to a commercial programmer in order to use this feature.
Additional details may be found in the
P89LPC9408 User manual
.
7.29.7 In-Application Programming
In-Application Programming is performed in the application under the control of the
microcontroller’s firmware. The IAP facility consists of internal hardware resources to
facilitate programming and erasing. The Philips IAP has made IAP in an embedded
application possible without additional components. Two methods are available to
accomplish IAP. A set of predefined IAP functions are provided in a Boot ROM and can be
called through a common interface, PGM_MTP. Several IAP calls are available for use by
an application program to permit selective erasing and programming of flash sectors,
pages, security bits, configuration bytes, and device ID. These functions are selected by
setting up the microcontroller’s registers before making a call to PGM_MTP at FF03H.
The Boot ROM occupies the program memory space at the top of the address space from
FF00H to FEFFH, thereby not conflicting with the user program memory space.
In addition, IAP operations can be accomplished through the use of four SFRs consisting
of a control/status register, a data register, and two address registers. Additional details
may be found in the
P89LPC9408 User manual
.
7.29.8 ISP
ISP is performed without removing the microcontroller from the system. The ISP facility
consists of a series of internal hardware resources coupled with internal firmware to
facilitate remote programming of the P89LPC9408 through the serial port. This firmware is
provided by Philips and embedded within each P89LPC9408 device. The Philips ISP
facility has made ISP in an embedded application possible with a minimum of additional
expense in components and circuit board area. The ISP function uses five pins (V
DD
,V
SS
,
TXD, RXD, and RST). Only a small connector needs to be available to interface your
application to an external circuit in order to use this feature.

P89LPC9408FBD,557

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
IC MCU 8BIT 8KB FLASH 64LQFP
Lifecycle:
New from this manufacturer.
Delivery:
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