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AT97SC3204-U4A14-10

P1-P3P4-P6P7-P8
This is a summary document.
The complete document is
available under NDA. For more
information, please contact
your local Atmel sales office.
Atmel-5295ES-TPM-AT97SC3204-LPC-Interface-Datasheet-Summary-032013
Features
Fully compliant to the Trusted Computing Group (TCG) Trusted Platform Module
(TPM) version 1.2 specification
Compliant with TCG PC client-specific TPM Interface Specification (TIS) version 1.2
Single-chip, turnkey solution
Hardware asymmetric crypto engine
Atmel
®
AVR
®
RISC microprocessor
Internal EEPROM storage for RSA keys
33MHz Low Pin Count (LPC) bus for easy PC interface
Secure hardware and firmware design and chip layout
Internal, high-quality Random Number Generator (RNG) – FIPS 140-2 compliant
NV storage space for 1756 bytes of user defined data
3.3V supply voltage
28-lead thin TSSOP, 28-lead wide TSSOP, or 40-pad QFN packages
Offered in both commercial (0 to 70°C) and industrial (-40 to +85°C)
temperature ranges
Description
The Atmel AT97SC3204 is a fully integrated security module designed to be integrated
into personal computers and other embedded systems. It implements version 1.2 of the
Trusted Computing Group (TCG) specification for Trusted Platform Modules (TPM).
The TPM includes a cryptographic accelerator capable of computing a 2048-bit RSA
signature in 200ms and a 1024-bit RSA signature in 40ms. Performance of the SHA-1
accelerator is 20μs per 64-byte block.
The chip communicates with the PC through the LPC interface. The TPM supports
SIRQ (for interrupts) and CLKRUN to permit clock stopping for power savings in mobile
computers.
Atmel AT97SC3204
Trusted Platform Module LPC Interface
SUMMARY DATASHEET
2
Atmel AT97SC3204 LPC Interface [SUMMARY DATASHEET]
Atmel-5295ES-TPM-AT97SC3204-LPC-Interface-Datasheet-Summary-032013
1. Pin Configurations and Pinouts
Table 1-1. Pin Configurations
Table 1-2. Pinouts
Pin name Function
V
CC
3.3V Supply Voltage
SB3V Standby 3.3V Supply Voltage
GND Ground
LRESET# PCI Reset Input Active Low
LAD0 LPC Command, Address, Data Line Input/Output
LAD1 LPC Command, Address, Data Line Input/Output
LAD2 LPC Command, Address, Data Line Input/Output
LAD3 LPC Command, Address, Data Line Input/Output
LCLK 33MHz PCI Clock Input
LFRAME# LPC FRAME Input
CLKRUN# PCI Clock Run Input/Output
LPCPD# LPC Power-Down Input
SERIRQ Serialized Interrupt Request Input/Output
GPIO-Express-00 GPIO assigned to TPM_NV_INDEX_GPIO_00
TestI Test Input (Disabled)
TestBI Test Input (Disabled)
ATest Atmel Test Pin
NC No Connect
NBO Not Bounded Out
40-pin QFN
6.0mm x 6.0mm Body
0.50mm Pitch
ATest
ATest
LPCPD#
SERIRQ
NBO
NBO
NBO
NBO
NBO
NBO
NBO
NBO
NBO
NBO
NBO
NBO
NBO
NBO
CLKRUN#
LRESET#
ATest
GND
SB3V
GPIO-Express-00
NC
TestI
TestBI
V
CC
GND
NBO
LAD0
GND
V
CC
LAD1
LFRAME#
LCLK
LAD2
V
CC
GND
LAD3
1
2
3
4
5
6
7
8
9
10
30
29
28
27
26
25
24
23
22
21
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
ATest
ATest
ATest
GND
SB3V
GPIO-Express-00
NC
TestI
TestBI
V
CC
GND
NBO
NBO
NBO
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
LPCPD#
SERIRQ
LAD0
GND
V
CC
LAD1
LFRAME#
LCLK
LAD2
V
CC
GND
LAD3
LRESET#
CLKRUN#
28-pin TSSOP
4.4mm x 9.7mm Body
0.65mm Pitch
28-pin TSSOP
6.1mm x 9.7mm Body
0.65mm Pitch
3
Atmel AT97SC3204 LPC Interface [SUMMARY DATASHEET]
Atmel-5295ES-TPM-AT97SC3204-LPC-Interface-Datasheet-Summary-032013
2. Block Diagram
The TPM includes a hardware random number generator, including a FIPS-approved Pseudo Random Number
Generator that is used for key generation and TCG protocol functions. The RNG is also available to the system to
generate random numbers that may be needed during normal operation.
The chip uses a dynamic internal memory management scheme to store multiple RSA keys. Other than the standard
TCG commands (TPM_FlushSpecific, TPM_Loadkey2), no system intervention is required to manage this internal key
cache.
The TPM is offered to OEM and ODM manufacturers as a turnkey solution, including the firmware integrated on the chip.
In addition, Atmel provides the necessary device driver software for integration into certain operating systems, along with
BIOS drivers. Atmel will also provide manufacturing support software for use by OEMs and ODMs during initialization
and verification of the TPM during board assembly.
Full documentation for TCG primitives can be found in the TCG TPM Main Specification, Parts 1 to 3, on the TCG Web
site located at https://www.trustedcomputinggroup.org. TPM features specific to PC Client platforms are specified in the
“TCG PC Client Specific TPM Interface Specification, Version 1.2”, also available on the TCG web site. Implementation
guidance for 32-bit PC platforms is outlined in the “TCG PC Client Specific Implementation Specification for Conventional
BIOS for TCG Version 1.2”, also available on the TCG website.
ROM
Program
EEPROM
Program
33MHz
LPC
Interface
GPIO
GPIO-Express-00
AVR
8-bit RISC
CPU
SRAM
EEPROM
Data
CRYPTO
Engine
RNG
Timer
Physical
Security
Circuitry
P1-P3P4-P6P7-P8

AT97SC3204-U4A14-10

Mfr. #:
Buy AT97SC3204-U4A14-10
Manufacturer:
Microchip Technology / Atmel
Description:
Security ICs / Authentication ICs ffTPM SPI C7b LARI Com 4.4mm
Lifecycle:
New from this manufacturer.
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