CAT4104
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10
VIN
CAT4104
5 V
VCC
R1
1436 W
M1
C1
0.1 mF
EN/PWM
RSET
LED1
LED2
LED3
LED4
GND
350 mA
C2
1 mF
R2
5 kW
RPTC
Figure 23. LED Current Derating
Power Dissipation
The power dissipation (P
D
) of the CAT4104 can be
calculated as follows:
P
D
+ (V
IN
I
IN
) ) S(V
LEDN
I
LEDN
)
where V
LEDN
is the voltage at the LED pin, and I
LEDN
is the
LED current. Combinations of high V
LEDN
voltage and high
ambient temperature can cause the CAT4104 to enter
thermal shutdown. In applications where V
LEDN
is high, a
resistor can be inserted in series with the LED string to lower
the power dissipation P
D
.
Thermal dissipation of the junction heat consists
primarily of two paths in series. The first path is the junction
to the case (q
JC
) thermal resistance which is defined by the
package style, and the second path is the case to ambient
(q
CA
) thermal resistance, which is dependent on board
layout. The overall junction to ambient (q
JA
) thermal
resistance is equal to:
q
JA
+ q
JC
) q
CA
For a given package style and board layout, the operating
junction temperature T
J
is a function of the power
dissipation P
D
, and the ambient temperature, resulting in the
following equation:
T
J
+ T
AMB
) P
D
(q
JC
) q
CA
) + T
AMB
) P
D
q
JA
When mounted on a doublesided printed circuit board
with two square inches of copper allocated for “heat
spreading”, the resulting q
JA
is about 90°C/W for the
TDFN8 package, and 160°C/W for the SOIC8 package.
For example, at 60°C ambient temperature, the maximum
power dissipation for the TDFN8 is calculated as follow:
P
Dmax
+
T
Jmax
* T
AMB
q
JA
+
150 * 60
90
+ 1W
Recommended
Layout
A small ceramic capacitor should be placed as close as
possible to the driver VIN pin. The RSET resistor should
have a Kelvin connection to the GND pin of the CAT4104.
The board layout should provide good thermal dissipation
through the PCB. In the case of the CAT4104VP2 in the
TDFN package, a via can be used to connect the center tab
to a large ground plane underneath as shown on Figure 24.
Figure 24. CAT4104 Recommended Layout
CAT4104
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PACKAGE DIMENSIONS
SOIC 8, 150 mils
CASE 751BD01
ISSUE O
E1 E
A
A1
h
θ
L
c
e
b
D
PIN # 1
IDENTIFICATION
TOP VIEW
SIDE VIEW
END VIEW
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MS-012.
SYMBOL MIN NOM MAX
θ
A
A1
b
c
D
E
E1
e
h
0.10
0.33
0.19
0.25
4.80
5.80
3.80
1.27 BSC
1.75
0.25
0.51
0.25
0.50
5.00
6.20
4.00
L
0.40 1.27
1.35
CAT4104
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PACKAGE DIMENSIONS
TDFN8, 2x3
CASE 511AK01
ISSUE A
PIN#1
IDENTIFICATION
E2
E
A3
ebD
A2
TOP VIEW SIDE VIEW BOTTOM VIEW
PIN#1 INDEX AREA
FRONT VIEW
A1
A
L
D2
Notes:
(1) All dimensions are in millimeters.
(2) Complies with JEDEC MO-229.
SYMBOL MIN NOM MAX
A 0.70 0.75 0.80
A1 0.00 0.02 0.05
A3 0.20 REF
b 0.20 0.25 0.30
D 1.90 2.00 2.10
D2 1.30 1.40 1.50
E 3.00
E2 1.20 1.30 1.40
e
2.90
0.50 TYP
3.10
L 0.20 0.30 0.40
A2 0.45 0.55 0.65

CAT4104V-GT3

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
LED Lighting Drivers LED Driver 32 LED Series/Parallel
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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