MC100EP01MNR4G

© Semiconductor Components Industries, LLC, 2016
August, 2016 Rev. 10
1 Publication Order Number:
MC10EP01/D
MC10EP01, MC100EP01
3.3V / 5V ECL 4-Input
OR/NOR
Description
The MC10EP01 is a 4-input OR/NOR gate. The device is
functionally equivalent to the EL01 device, LVEL01, and E101 (a
quad version). With AC performance much faster than the LVEL01
device, the EP01 is ideal for applications requiring the fastest AC
performance available.
The 100 Series contains temperature compensation.
Features
230 ps Typical Propagation Delay
Maximum Frequency = > 3 GHz Typical
PECL Mode Operating Range:
V
CC
= 3.0 V to 5.5 V with V
EE
= 0 V
NECL Mode Operating Range:
V
CC
= 0 V with V
EE
= 3.0 V to 5.5 V
Open Input Default State
These Devices are Pb-Free, Halogen Free and are RoHS Compliant
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb-Free Package
H = MC10
K = MC100
5H = MC10
2W = MC100
M = Date Code
SOIC8 NB
D SUFFIX
CASE 75107
MARKING DIAGRAMS*
TSSOP8
DT SUFFIX
CASE 948R02
ALYWG
G
HP01
ALYWG
G
KP01
1
8
1
8
1
8
www.onsemi.com
*For additional marking information, refer to
Application Note AND8002/D
.
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
ORDERING INFORMATION
1
8
HEP01
ALYW
G
1
8
KEP01
ALYW
G
1
8
DFN8
MN SUFFIX
CASE 506AA
5H MG
G
14
2W MG
G
14
(Note: Microdot may be in either location)
SOIC8 NB TSSOP8 DFN8
MC10EP01, MC100EP01
www.onsemi.com
2
1
2
3
45
6
7
8
Q
V
EE
V
CC
D1
Q
D2
D3
D0
Figure 1. 8-Lead Pinout (Top View)
and Logic Diagram
Table 1. PIN DESCRIPTION
Pin Function
D0 D3 ECL Data Inputs
Q, Q ECL Data Outputs
V
CC
Positive Supply
V
EE
Negative Supply
EP (DFN8 only) Thermal exposed pad must be
connected to a sufficient thermal conduit. Elec-
trically connect to the most negative supply
(GND) or leave unconnected, floating open.
Table 2. TRUTH TABLE
D0* D1* D2* D3* Q Q
L L L L L H
H X X X H L
X H X X H L
X X H X H L
X X X H H L
H H H H H L
*Pins will default LOW when left open.
Table 3. ATTRIBUTES
Characteristics Value
Internal Input Pulldown Resistor
75 kW
Internal Input Pullup Resistor N/A
ESD Protection
Human Body Model
Machine Model
Charged Device Model
> 4 kV
> 200 V
> 2 kV
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Pb-Free Pkg
SOIC8 NB
TSSOP8
DFN8
Level 1
Level 3
Level 1
Flammability Rating Oxygen Index: 28 to 34 UL 94 V0 @ 0.125 in
Transistor Count 115 Devices
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
MC10EP01, MC100EP01
www.onsemi.com
3
Table 4. MAXIMUM RATINGS
Symbol Parameter Condition 1 Condition 2 Rating Unit
V
CC
PECL Mode Power Supply V
EE
= 0 V 6 V
V
EE
NECL Mode Power Supply V
CC
= 0 V 6 V
V
I
PECL Mode Input Voltage
NECL Mode Input Voltage
V
EE
= 0 V
V
CC
= 0 V
V
I
V
CC
V
I
V
EE
6
6
V
I
out
Output Current Continuous
Surge
50
100
mA
I
BB
V
BB
Sink/Source ±0.5 mA
T
A
Operating Temperature Range 40 to +85 °C
T
stg
Storage Temperature Range 65 to +150 °C
q
JA
Thermal Resistance (Junction-to-Ambient) 0 lfpm
500 lfpm
SOIC8 NB
SOIC8 NB
190
130
°C/W
q
JC
Thermal Resistance (Junction-to-Case) Standard Board SOIC8 NB 41 to 44 °C/W
q
JA
Thermal Resistance (Junction-to-Ambient) 0 lfpm
500 lfpm
TSSOP8
TSSOP8
185
140
°C/W
q
JC
Thermal Resistance (Junction-to-Case) Standard Board TSSOP8 41 to 44 °C/W
q
JA
Thermal Resistance (Junction-to-Ambient) 0 lfpm
500 lfpm
DFN8
DFN8
129
84
°C/W
T
sol
Wave Solder (Pb-Free) < 2 to 3 sec @ 260°C 265 °C
q
JC
Thermal Resistance (Junction-to-Case) (Note 2) DFN8 35 to 40 °C/W
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
2. JEDEC standard multilayer board 2S2P (2 signal, 2 power)

MC100EP01MNR4G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Logic Gates BBG ECL OR/NOR 4INPT
Lifecycle:
New from this manufacturer.
Delivery:
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