AD7891
–14–
REV. D
Track/Hold Amplifier
The track/hold amplifier on the AD7891 allows the ADC to
accurately convert an input sine wave of full-scale amplitude
to 12-bit accuracy. The input bandwidth of the track/hold is
greater than the Nyquist rate of the ADC even when the ADC is
operated at its maximum throughput rate of 454 kHz (AD7891-1)
or 500 kHz (AD7891-2). In other words, the track/hold amplifier
can handle input frequencies in excess of 227 kHz (AD7891-1)
or 250 kHz (AD7891-2).
The track/hold amplifier acquires an input signal in 600 ns
(AD7891-1) or 400 ns (AD7891-2). The operation of the track/
hold is essentially transparent to the user. The track/hold amplifier
goes from its tracking mode to its hold mode on the rising edge
of CONVST. The aperture time for the track/hold (i.e., the
delay between the external CONVST signal and the track/hold
actually going into hold) is typically 15 ns. At the end of conversion,
the part returns to its tracking mode. The track/hold starts acquiring
the next signal at this point.
STANDBY Operation
The AD7891 can be put into power save or standby mode by
using the STANDBY pin or the SWSTBY bit of the control
register. Normal operation of the AD7891 takes place when the
STANDBY input is at a Logic 1 and the SWSTBY bit is at a
Logic 0. When the STANDBY pin is brought low or a 1 is writ-
ten to the SWSTBY bit, the part goes into its standby mode of
operation, reducing its power consumption to typically 75 mW.
The AD7891 is returned to normal operation when the
STANDBY input is at a Logic 1 and the SWSTBY bit is a
Logic 0. The wake-up time of the AD7891 is normally determined
by the amount of time required to charge the 0.1 mF capacitor
between the REF OUT/REF IN pin and REF GND. If the
internal reference is being used as the reference source, this
capacitor is charged via a nominal 2 kW resistor. Assuming 10
time constants to charge the capacitor to 12-bit accuracy, this
implies a wake-up time of 2 ms.
If an external reference is used, this must be taken into account
when working out how long it will take to charge the capacitor.
If the external reference has remained at 2.5 V during the time
the AD7891 was in standby mode, the capacitor will already be
charged when the part is taken out of standby mode. Therefore,
the wake-up time is now the time required for the internal
circuitry of the AD7891 to settle to 12-bit accuracy. This typi-
cally takes 5 ms. If the external reference was also put into
standby then the wake-up time of the reference, combined with
the amount of time taken to recharge the reference capacitor
from the external reference, determines how much time must
elapse before conversions can begin again.
MICROPROCESSOR INTERFACING
AD7891 to 8X51 Serial Interface
A serial interface between the AD7891 and the 8X51
microcontroller is shown in Figure 7. TXD of the 8X51 drives
SCLK of the AD7891, while RXD transmits data to and
receives data from the part. The serial clock speed of the 8X51 is
slow compared to the maximum serial clock speed of the
AD7891, so maximum throughput of the AD7891 is not
achieved with this interface.
8X51*
DATA OUT
AD7891
*ADDITIONAL PINS OMITTED FOR CLARITY
SCLK
DATA IN
RFS
TFS
P3.4
P3.3
TXD
RXD
*
Figure 7. AD7891 to 8X51 Interface
The 8X51 provides the LSB of its SBUF register as the first bit
in the serial data stream. The AD7891 expects the MSB of the
6-bit write first. Therefore, the data in the SBUF register must
be arranged correctly so that this is taken into account. When
data is to be transmitted to the part, P3.3 is taken low. The
8X51 transmits its data in 8-bit bytes with only eight falling
clock edges occurring in the transmit cycle. One 8-bit transfer
is needed to write data to the control register of the AD7891.
After the data has been transferred, the P3.3 line is taken high
to complete the transmission.
When reading data from the AD7891, P3.4 of the 8X51 is taken
low. Two 8-bit serial reads are performed by the 8X51, and
P3.4 is taken high to complete the transfer. Again, the 8X51
expects the LSB first, while the AD7891 transmits MSB first, so
this must be taken into account in the 8X51 software.
No provision has been made in the given interface to determine
when a conversion has ended. If the conversions are initiated by
software, the 8X51 can wait a predetermined amount of time
before reading back valid data. Alternately, the falling edge of
the EOC signal can be used to initiate an interrupt service
routine that reads the conversion result from part to part.
AD7891 to 68HC11 Serial Interface
Figure 8 shows a serial interface between the AD7891 and the
68HC11 microcontroller. SCK of the 68HC11 drives SCLK of
the AD7891, the MOSI output drives DATA IN of the
AD7891, and the MISO input receives data from DATA OUT
of the AD7891. Ports PC6 and PC7 of the 68HC11 drive the
TFS and RFS lines of the AD7891, respectively.
For correct operation of this interface, the 68HC11 should be
configured such that its CPOL bit is a 1 and its CPHA bit is a 0.
When data is to be transferred to the AD7891, PC7 is taken
low. When data is to be received from the AD7891, PC6 is
taken low. The 68HC11 transmits and receives its serial data in
8-bit bytes, MSB first. The AD7891 also transmits and receives
data MSB first. Eight falling clock edges occur in a read or write
cycle from the 68HC11. A single 8-bit write with PC7 low is
required to write to the control register. When data has been
written, PC7 is taken high. When reading from the AD7891,
PC6 is left low after the first eight bits have been read. A second
byte of data is then transmitted serially from the AD7891. When
this transfer is complete, the PC6 line is taken high.
