AD820
Rev. H | Page 9 of 24
ABSOLUTE MAXIMUM RATINGS
Table 4.
Parameter Rating
Supply Voltage ±18 V
Internal Power Dissipation
8-Lead PDIP (N) 1.6 W
8-Lead SOIC_N (R) 1.0 W
8-Lead MSOP (RM) 0.8 W
Input Voltage
1
((V+) + 0.2 V) to
(V) 20 V
Output Short-Circuit Duration Indefinite
Differential Input Voltage ±30 V
Storage Temperature Range
8-Lead PDIP (N) −65°C to +125°C
8-Lead SOIC_N (R) −65°C to +150°C
8-Lead MSOP (RM) −65°C to +150°C
Operating Temperature Range
AD820A/AD820B 40°C to +85°C
Lead Temperature(Soldering, 60 sec) 260°C
1
See Input Characteristics section.
THERMAL RESISTANCE
θ
JA
is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 5. Thermal Resistance
Package Type θ
JA
Unit
8-Lead PDIP (N) 90 °C/W
8-Lead SOIC_N (R) 160 °C/W
8-Lead MSOP (RM) 190 °C/W
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
AD820
Rev. H | Page 10 of 24
TYPICAL PERFORMANCE CHARACTERISTICS
50
0
–0.5 0.5
OFFSET VOLTAGE (mV)
NUMBER OF UNITS
00873-005
40
30
20
10
–0.4 –0.3 –0.2 –0.1 0 0.1 0.2 0.3 0.4
V
S
= 0V, 5V
Figure 4. Typical Distribution of Offset Voltage (248 Units)
48
0
–10 10
OFFSET VOLTAGE DRIFT (µV/ºC)
% IN BIN
00873-006
40
32
24
16
8
–8 –6 –4 –2 0 2 4 6 8
V
S
= ±5V
V
S
= ±15V
Figure 5. Typical Distribution of Offset Voltage Drift (120 Units)
50
0
0 10
INPUT BIAS CURRENT (pA)
NUMBER OF UNITS
00873-007
45
40
35
30
25
20
15
10
5
1 2 3 4 5 6 7 8 9
Figure 6. Typical Distribution of Input Bias Current (213 Units)
5
–5
–5 5
COMMON-MODE VOLTAGE (V)
INPUT BIAS CURRENT (pA)
00873-008
0
–4 –3 –2 –1 0 1 2 3 4
V
S
= ±5V
V
S
= 0V, +5V AND ±5V
Figure 7. Input Bias Current vs. Common-Mode Voltage;
V
S
= +5 V, 0 V and V
S
= ±5 V
1k
0.1
–16 16
COMMON-MODE VOLTAGE (V)
INPUT BIAS CURRENT (pA)
00873-009
1
10
100
–12 –8 –4 0 4 8 12
Figure 8. Input Bias Current vs. Common-Mode Voltage; V
S
= ±15 V
100k
0.1
20 140
TEMPERATURE (ºC)
INPUT BIAS CURRENT (pA)
00873-010
1
10
100
1k
10k
40 60 80 100 120
Figure 9. Input Bias Current vs. Temperature; V
S
= 5 V, V
CM
= 0 V
AD820
Rev. H | Page 11 of 24
10M
10k
100 100k
LOAD RESISTANCE (Ω)
OPEN-LOOP GAIN (V/V)
00873-011
1k 10k
100k
1M
V
S
= ±15V
V
S
= 0V, +5V
Figure 10. Open-Loop Gain vs. Load Resistance
10M
10k
–60 140
TEMPERATURE (ºC)
OPEN-LOOP GAIN (V/V)
00873-012
100k
1M
–40 –20 0 20 40 60 80 100 120
V
S
= ±15V
R
L
= 100kΩ
R
L
= 10kΩ
V
S
= 0V, +5V
V
S
= ±15V
V
S
= 0V, +5V
V
S
= ±15V
V
S
= 0V, +5V
R
L
= 600Ω
Figure 11. Open-Loop Gain vs. Temperature
300
–300
–16 16
OUTPUT VOLTAGE (V)
INPUT ERROR VOLTAGE (µV)
00873-013
200
100
0
–100
–200
–12 –8 –4 0 4 8 12
R
L
= 100kΩ
R
L
= 600Ω
R
L
= 10kΩ
Figure 12. Input Error Voltage vs. Output Voltage for Resistive Loads
40
–40
0 300
OUTPUT VOLTAGE FROM RAILS (mV)
INPUT ERROR VOLTAGE (µV)
00873-014
20
0
–20
60 120 180 240
R
L
= 100kΩ
R
L
= 20kΩ
R
L
= 2kΩ
POSITIVE
RAIL
POSITIVE
RAIL
POSITIVE
RAIL
NEGATIVE
RAIL
NEGATIVE
RAIL
NEGATIVE RAIL
Figure 13. Input Error Voltage vs. Output Voltage Within 300 mV of Either
Supply Rail for Various Resistive Loads; V
S
= ±5 V
1k
1
1 10k
FREQUENCY (Hz)
INPUT VOLTAGE NOISE (nV/√Hz)
00873-015
10 100 1k
10
100
Figure 14. Input Voltage Noise vs. Frequency
–40
–110
100 100k
FREQUENCY (Hz)
THD (dB)
00873-016
1k 10k
–50
–60
–70
–80
–90
–100
R
L
= 10kΩ
A
CL
= –1
V
S
= ±15V; V
OUT
= 20V p-p
V
S
= ±5V; V
OUT
= 9V p-p
V
S
= 0V, +5V; V
OUT
= 4.5V p-p
Figure 15. Total Harmonic Distortion vs. Frequency

AD820ANZ

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Precision Amplifiers SGL-Supply RR Lo Pwr FET-Inpt
Lifecycle:
New from this manufacturer.
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