CAT9552
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6
Pin Description
SCL: Serial Clock
The serial clock input clocks all data transferred into or out
of the device. The SCL line requires a pullïup resistor if it
is driven by an open drain output.
SDA: Serial Data/Address
The bidirectional serial data/address pin is used to transfer
all data into and out of the device. The SDA pin is an open
drain output and can be wireïORed with other open drain or
open collector outputs. A pullïup resistor must be connected
from SDA line to V
CC
.
LED0ïLED15: LED Driver Outputs/General Purpose I/Os
These pins are open drain outputs used to directly drive
LEDs. Any of these pins can be programmed to drive the
LED ON, OFF, or to Blink Rate1 or Blink Rate2. A current
limiting resistor should be placed in series with each LED to
control the maximum LED current. When not used for
controlling the LEDs, these pins may be used as general
purpose parallel input/output.
RESET: External Reset Input
Active low Reset input is used to initialize the CAT9552
internal registers and the I
2
C state machine. The internal
registers are held in their default state while Reset input is
active. An external pullïup resistor of maximum 25 kW is
required when this pin is not actively driven.
Functional Description
The CAT9552 is a 16ïchannel I/O bus expander that
provides a pair of programmable LED blinkers, controlled
through an I
2
C compatible serial interface.
The CAT9552 supports the I
2
C Bus data transmission
protocol. This InterïIntegrated Circuit Bus protocol defines
any device that sends data to the bus to be a transmitter and any
device receiving data to be a receiver. The transfer is controlled
by the Master device which generates the serial clock and all
START and STOP conditions for bus access. The CAT9552
operates as a Slave device. Both the Master device and Slave
device can operate as either transmitter or receiver, but the
Master device controls which mode is activated.
I
2
C Bus Protocol
The features of the I
2
C bus protocol are defined as follows:
1. Data transfer may be initiated only when the bus is
not busy.
2. During a data transfer, the data line must remain
stable whenever the clock line is high. Any changes
in the data line while the clock line is high will be
interpreted as a START or STOP condition
(Figure 5).
START and STOP Conditions
The START Condition precedes all commands to the
device, and is defined as a HIGH to LOW transition of SDA
when SCL is HIGH. The CAT9552 monitors the SDA and
SCL lines and will not respond until this condition is met.
A LOW to HIGH transition of SDA when SCL is HIGH
determines the STOP condition. All operations must end
with a STOP condition.
Device Addressing
After the bus Master sends a START condition, a slave
address byte is required to enable the CAT9552 for a read or
write operation. The four most significant bits of the slave
address are fixed as binary 1100 (Figure 6). The CAT9552
uses the next three bits as address bits.
The address bits A2, A1 and A0 are used to select which
device is accessed from maximum eight devices on the same
bus. These bits must compare to their hardwired input pins.
The 8th bit following the 7ïbit slave address is the R/W bit
that specifies whether a read or write operation is to be
performed. When this bit is set to “1”, a read operation is
initiated, and when set to “0”, a write operation is selected.
Following the START condition and the slave address byte,
the CAT9552 monitors the bus and responds with an
acknowledge (on the SDA line) when its address matches the
transmitted slave address. The CAT9552 then performs a read
or a write operation depending on the state of the R/W bit.
Figure 5. Start/Stop Timing
START CONDITION
SDA
STOP CONDITION
SCL
Figure 6. CAT9552 Slave Address
1 100A2A1A0
SLAVE ADDRESS
FIXED PROGRAMMABLE
HARDWARE SELECTABLE
R/W
