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HIP6603BECBZ

P1-P3P4-P6P7-P9P10-P12P13-P14
10
FN9072.9
December 10, 2015
Typical Performance Curves
FIGURE 3. POWER DISSIPATION vs LOADING
FIGURE 4. POWER DISSIPATION vs FREQUENCY (HIP6603B)
FIGURE 5. 3nF LOADING PROFILE (HIP6603B) FIGURE 6. VARIABLE LOADING PROFILE (HIP6603B)
FIGURE 7. POWER DISSIPATION vs FREQUENCY (HIP6601B)
FIGURE 8. POWER DISSIPATION vs LOWER GATE
CAPACITANCE FOR FIXED VALUES OF UPPER
GATE CAPACITANCE
1000
800
600
400
200
1.0 2.0 3.0 4.0 5.0
GATE CAPACITANCE (C
U
= C
L
) (nF)
POWER (mW)
0
VCC = PVCC = 12V
FREQUENCY
= 1MHz
FREQUENCY = 500kHz
FREQUENCY = 200kHz
400
300
200
100
0
0 500 1000 1500 2000
FREQUENCY (kHz)
POWER (mW)
VCC = 12V, PVCC = 5V
C
U
= C
L
= 2nF
C
U
= C
L
= 1nF
C
U
= C
L
= 5nF
C
U
= C
L
= 4nF
C
U
= C
L
= 3nF
VCC = 12V, PVCC = 5V
C
U
= C
L
= 3nF
C
U
= 3nF
C
U
= 0nF
C
L
= 0nF
C
L
= 3nF
400
300
200
100
0
POWER (mW)
0 500 1000 1500 2000
FREQUENCY (kHz)
FREQUENCY = 500kHz
FREQUENCY = 1MHz
VCC = 12V,
FREQUENCY = 200kHz
PVCC = 5V
FREQUENCY = 500kHz
400
300
200
100
0
1.0 2.0 3.0 4.0 5.0
GATE CAPACITANCE = (C
U
= C
L
) (nF)
POWER (mW)
VCC = 12V, PVCC = 5V
FREQUENCY = 1MHz
FREQUENCY = 500kHz
FREQUENCY = 200kHz
1000
600
400
200
0
1.0 2.0 3.0 4.0 5.0
POWER (mW)
800
GATE CAPACITANCE (C
U
= C
L
) (nF)
500
400
300
200
1.02.03.04.05.0
POWER (mW)
LOWER GATE CAPACITANCE (C
L
) (nF)
100
VCC = 12V, PVCC = 5V
FREQUENCY = 500kHz
C
U
= 5nF
C
U
= 3nF
C
U
= 1nF
HIP6601B, HIP6603B, HIP6604B
11
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9001 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN9072.9
December 10, 2015
About Intersil
Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products
address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets.
For the most updated datasheet, application notes, related documentation and related parts, please see the respective product
information page found at www.intersil.com.
You may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask
.
Reliability reports are also available from our website at www.intersil.com/support.
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to the web to make
sure that you have the latest revision.
DATE REVISION CHANGE
December 10, 2015 FN9072.9 - Updated Ordering Information Table on page 2.
- Added Revision History.
- Added About Intersil Verbiage.
- Updated POD M8.15 to latest revision changes are as follow:
Changed Note 1 "1982" to "1994"
Changed in Typical Recommended Land Pattern the following:
2.41(0.095) to 2.20(0.087)
0.76 (0.030) to 0.60(0.023)
0.200 to 5.20(0.205)
Updated to new POD format by removing table and moving dimensions onto drawing and adding land
pattern.
HIP6601B, HIP6603B, HIP6604B
12
FN9072.9
December 10, 2015
HIP6601B, HIP6603B, HIP6604B
Small Outline Exposed Pad Plastic Packages (EPSOIC)
INDEX
AREA
E
D
N
123
-B-
0.25(0.010) C AM BS
e
-A-
L
B
M
-C-
A1
A
SEATING PLANE
0.10(0.004)
h x 45
o
C
H
0.25(0.010) BM M
P1
123
P
BOTTOM VIEW
N
TOP VIEW
SIDE VIEW
M8.15B
8 LEAD NARROW BODY SMALL OUTLINE EXPOSED PAD
PLASTIC PACKAGE
SYMBOL
INCHES MILLIMETERS
NOTESMIN MAX MIN MAX
A 0.056 0.066 1.43 1.68 -
A1 0.001 0.005 0.03 0.13 -
B 0.0138 0.0192 0.35 0.49 9
C 0.0075 0.0098 0.19 0.25 -
D 0.189 0.196 4.80 4.98 3
E 0.150 0.157 3.81 3.99 4
e 0.050 BSC 1.27 BSC -
H 0.230 0.244 5.84 6.20 -
h 0.010 0.016 0.25 0.41 5
L 0.016 0.035 0.41 0.89 6
N8 87
0° 8° 0° 8° -
P - 0.094 - 2.387 11
P1 - 0.094 - 2.387 11
Rev. 5 8/10
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section
2.2 of Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.15mm (0.006 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions.
Interlead flash and protrusions shall not exceed 0.25mm (0.010
inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch).
10. Controlling dimension: INCH. Converted millimeter dimensions
are not necessarily exact.
11. Dimensions “P” and “P1” are thermal and/or electrical enhanced
variations. Values shown are maximum size of exposed pad
within lead count and body size.
P1-P3P4-P6P7-P9P10-P12P13-P14

HIP6603BECBZ

Mfr. #:
Buy HIP6603BECBZ
Manufacturer:
Renesas / Intersil
Description:
Gate Drivers SYNCHRONUSCTIFIED BUCK MSFT DRVR
Lifecycle:
New from this manufacturer.
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