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ISL6744AAUZ

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18
13
FN6554.0
October 8, 2007
based on the nature of the intended load, multiple buck
regulators. To minimize the output impedance of the filter, a
SANYO OSCON 16SH150M capacitor in parallel with a
22μF ceramic capacitor were selected.
Current Limit Threshold
The current limit threshold is fixed at 0.6V nominal, which is
the reference to the overcurrent protection comparator. The
current level that corresponds to the overcurrent threshold
must be chosen to allow for the dynamic behavior of an open
loop converter. In particular, the low inductor ripple current
under steady state operation increases significantly as the
duty cycle decreases.
Figures 8 and 9 show the behavior of the inductor ripple
under steady state and overcurrent conditions. In this
example, the peak current limit is set at 11A. The peak
current limit causes the duty cycle to decrease resulting in a
reduction of the average current through the inductor. The
implication is that the converter can not supply the same
output current in current limit that it can supply under steady
state conditions. The peak current limit setpoint must take
this behavior into consideration. A 5.11Ω current sense
resistor was selected for the rectified secondary of current
transformer T2 for the ISL6744Eval 1, corresponding to a
peak current limit setpoint of about 11A.
Performance
The major performance criteria for the converter are
efficiency, and to a lesser extent, load regulation. Efficiency,
load regulation and line regulation performance are
demonstrated in the following Figures.
As expected, the output voltage varies considerably with line
and load when compared to an equivalent converter with a
closed loop feedback. However, for applications where tight
regulation is not required, such as those applications that
use downstream DC/DC converters, this design approach is
viable.
FIGURE 8. STEADY STATE SECONDARY WINDING
VOLTAGE AND INDUCTOR CURRENT
14
13
12
11
10
9
8
0.9950 0.9960 0.9970 0.9980 0.9990 1.000
TIME (ms)
V (L1:1)
I (L1)
FIGURE 9. SECONDARY WINDING VOLTAGE AND
INDUCTOR CURRENT DURING CURRENT LIMIT
OPERATION
V (L1:1)
I (L1)
0.986 0.988 0.990 0.992 0.994 1.000
TIME (ms)
0.996 0.998
15
10
5
FIGURE 10. EFFICIENCY vs LOAD V
IN
= 48V
100
95
90
85
85
70
0 2345678910
LOAD CURRENT (A)
EFFICIENCY (%)
1
75
FIGURE 11. LOAD REGULATION AT V
IN
= 48V
12.50
12.25
12.00
11.75
11.50
11.00
0 2345678910
LOAD CURRENT (A)
OUTPUT VOLTAGE (V)
1
11.25
ISL6744A
14
FN6554.0
October 8, 2007
Waveforms
Typical waveforms can be found in the following Figures.
Figure 13 shows the output voltage ripple and noise at a 5A.
Figures 14 and 15 show the voltage waveforms at the
switching node shared by the upper FET source and the
lower FET drain. In particular, Figure 15 shows near ZVS
operation at 5A of load when the upper FET is turning off
and the lower FET is turning on. ZVS operation occurs
completely, implying that all the energy stored in the node
capacitance has been recovered. Figure 16 shows the
switching transition between outputs, OUTA and OUTB
during steady state operation. The deadtime duration of
46.9ns is clearly shown.
A 2.7V zener is added between the Vdd pins of ISL6700 and
ISL6744, in order to ensure that the PWM turns on only after
the driver has turned on, thereby ensuring the soft-start
function. Figure 17 shows the soft-start operation.
FIGURE 12. LINE REGULATION AT I
OUT
= 1A
13.5
13.0
12.5
12.0
11.5
10.5
42 44 45 46 47 48 49 50 51 53
INPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
43
11.0
52
FIGURE 13. OUTPUT RIPPLE AND NOISE - 20MHz BW
FIGURE 14. FET DRAIN-SOURCE VOLTAGE
FIGURE 15. FET D-S VOLTAGE NEAR-ZVS TRANSITION
FIGURE 16. OUTA - OUTB TRANSITION
ISL6744A
15
FN6554.0
October 8, 2007
Component List
REFERENCE
DESIGNATOR VALUE DESCRIPTION
C1 1.0µF Capacitor, 1812, X7R, 100V, 20%
C2, C3 3.3µF Capacitor, 1812, X5R, 50V, 20%
C4 1.0µF Capacitor, 0805, X5R, 16V, 10%
C5 0.1µF Capacitor, 0603, X7R, 16V, 10%
C6, C15 4.7µF Capacitor, 0805, X5R, 10V, 20%
C7 Open Capacitor, 0603, Open or Optional Discrete Stray Capacitance
C8 22µF Capacitor, 1812, X5R, 16V, 20%
C9 150µF Capacitor, Radial, Sanyo 16SH150M
C10, C11, C12,
C13, C14
1000pF Capacitor, 0603, X7R, 50V, 10%
C16 150pF Capacitor, 0603, COG, 16V, 5%
C18 0.01µF Capacitor, 0603, X7R, 16V, 10%
CR1, CR2 Diode, Schottky, BAT54S, 30V
CR3 Diode, Schottky, BAT54, 30V
CR4 Diode, Schottky, SMA, 100V, 2.1A
D1 Zener, 10V,Zetex BZX84C10ZXCT-ND
D2 Zener, 2.7V, BZX84C2V7
L1 190nH Pulse, P2004T
L2 1.5µH Bitech, HM73-301R5
L3 Short Jumper or Optional Discrete Leakage Inductance
P1, P2, P3, P4 Keystone, 1514-2
Q5 NPN Transistor, ON MJD31C
QL, QH FET, Fairchild FDS3672, 100V
FIGURE 17. OUTPUT SOFT-START
ISL6744A
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18

ISL6744AAUZ

Mfr. #:
Buy ISL6744AAUZ
Manufacturer:
Renesas / Intersil
Description:
Switching Controllers HI SPD DOUBLE ENDED CONT 8LD
Lifecycle:
New from this manufacturer.
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