74HC3GU04 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 5 — 2 October 2013 9 of 17
NXP Semiconductors 74HC3GU04
Triple unbuffered inverter
Remark: All values given are typical values unless otherwise specified.
Z
L
>10k.
R1 3k.
R2 1M.
Open loop amplification: A
OL
= 20 (typical).
Voltage amplification: .
V
o(p-p)
=V
CC
1.5 V centered at 0.5 V
CC
.
Unity gain bandwidth product is 5 MHz (typical).
Input capacitance see Figure 13
.
Fig 12. Linear amplifier application
(1) V
CC
= 2.0 V.
(2) V
CC
= 4.5 V.
(3) V
CC
= 6.0 V.
Fig 13. Typical input capacitance as a function of the input voltage
U04
R1
R2
V
CC
Z
L
mna052
1 μF
A
V
A
OL
1
R1
R2
-------
1A
OL
++
-----------------------------------------
=
08462
V
I
(V)
80
40
20
60
0
mna054
(1)
(2)
(3)
input
capacitance
(pF)
74HC3GU04 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 5 — 2 October 2013 10 of 17
NXP Semiconductors 74HC3GU04
Triple unbuffered inverter
Test data is given in Table 11 and Table 12.
C1 = 47 pF (typical).
C2 = 22 pF (typical).
R1 = 1 M to 10 M (typical).
R2 optimum value depends on the frequency and required stability against changes in V
CC
or average minimum I
CC
(I
CC
=2mA at V
CC
= 3.0 V and f = 1 MHz)
Fig 14. Crystal oscillator application
mna053
U04
out
R2
R1
C1 C2
Table 11. External components for resonator (f < 1 MHz)
Frequency R1 R2 C1 C2
10 kHz to 15.9 kHz 2.2 M 220 k 56 pF 20 pF
16 kHz to 24.9 kHz 2.2 M 220 k 56 pF 10 pF
25 kHz to 54.9 kHz 2.2 M 100 k 56 pF 10 pF
55 kHz to 129.9 kHz 2.2 M 100 k 47 pF 5 pF
130 kHz to 199.9 kHz 2.2 M 47 k 47 pF 5 pF
200 kHz to 349.9 kHz 2.2 M 47 k 47 pF 5 pF
350 kHz to 600 kHz 2.2 M 47 k 47 pF 5 pF
Table 12. Optimum value for R2
Frequency R2 Optimum
3 kHz 2.0 k minimum required I
CC
8.0 k minimum influence due to change in V
CC
6 kHz 1.0 k minimum required I
CC
4.7 k minimum influence by V
CC
10 kHz 0.5 k minimum required I
CC
2.0 k minimum influence by V
CC
14 kHz 0.5 k minimum required I
CC
2.0 k minimum influence by V
CC
> 14 kHz replace R2 by C3 = 35 pF (typical)
74HC3GU04 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 5 — 2 October 2013 11 of 17
NXP Semiconductors 74HC3GU04
Triple unbuffered inverter
15. Package outline
Fig 15. Package outline SOT505-2 (TSSOP8)
UNIT
A
1
A
max.
A
2
A
3
b
p
LH
E
L
p
wyv
ceD
(1)
E
(1)
Z
(1)
θ
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC JEDEC JEITA
mm
0.15
0.00
0.95
0.75
0.38
0.22
0.18
0.08
3.1
2.9
3.1
2.9
0.65
4.1
3.9
0.70
0.35
8°
0°
0.13 0.10.20.5
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
0.47
0.33
SOT505-2 - - -
02-01-16
w M
b
p
D
Z
e
0.25
14
8
5
θ
A
2
A
1
L
p
(A
3
)
detail X
A
L
H
E
E
c
v M
A
X
A
y
2.5 5 mm0
scale
TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm
SOT505-2
1.1
pin 1 index

74HC3GU04GD,125

Mfr. #:
Manufacturer:
Nexperia
Description:
Inverters INVERTER
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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