OMO ElectronicOMO Electronic
Expand menu
Hello, Sign inMy Account
0 Cart

FAN6248HCMX

P1-P3P4-P6P7-P9P10-P12P13-P15
FAN6248HC/HD/LC/LD
www.onsemi.com
4
MAXIMUM RATINGS
Symbol Parameter Min Max Unit
V
DD
Power Supply Input Pin Voltage −0.3 30 V
V
D1,
V
D2
Drain Sense Input Pin Voltage −1 100 V
V
GATE1,
V
GATE2
Gate Drive Output Pin Voltage −0.3 30 V
V
S1,
V
S2
Source Sense Input Pin Voltage −0.4 0.4 V
P
D
Power Dissipation (T
A
=25°C) 0.625 W
Q
JA
Thermal Resistance (Junction-to-Ambient Thermal) 165 °C/W
T
J
Operating Junction Temperature −40 150 °C
T
STG
Storage Temperature Range −60 150 °C
T
L
Lead Temperature (Soldering) 10 Seconds 260 °C
ESD Electrostatic Discharge
Capability
Human Body Model, ANSI / ESDA / JEDEC
JS−001−2012
4
kV
Charged Device Model, JESD22−C101 1.75
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. All voltage values are with respect to the GND pin
.
THERMAL CHARACTERISTICS
Symbol Rating Value Unit
R
y
JT
Thermal Characteristics 22
_C/W
R
q
JA
Thermal Characteristics 165
_C/W
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Max Unit
V
DD
VDD Pin Supply Voltage to GND (Note 2) 0 27 V
V
D1
,V
D2
Drain Sense Input Pin Voltage −0.7 100 V
V
S1
V
S2
Source Sense Input Pin Voltage −0.4 0.4 V
T
A
Operating Ambient Temperature (Note 3) −40 +125 °C
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
2. Allowable operating supply voltage V
DD
can be limited by the power dissipation of FAN6248 related to switching frequency, load capacitance
and ambient temperature.
3. Allowable operating ambient temperature can be limited by the power dissipation of FAN6248 related to switching frequency, load
capacitance on GATE pin and V
DD
.
FAN6248HC/HD/LC/LD
www.onsemi.com
5
ELECTRICAL CHARACTERISTICS (V
DD
= 12 V and T
J
= −40°C to +125°C unless otherwise specified)
Symbol
Parameter Conditions Min Typ Max Unit
INPUT VOLTAGE
V
DD_ON
Turn-On Threshold V
DD
rising 4.2 4.5 4.7 V
V
DD_OFF
Turn-Off Threshold V
DD
falling 4.0 4.2 4.4
V
DD_GATE_ON
*
SR Gate Enable Threshold Voltage V
DD
rising 7.2 V
I
DD_OP
Operating Current f
SW
= 100 kHz, C
GATE
= 3.3 nF 7 8.5 10 mA
I
DD_SRARTUP
V
DD
= V
DD_ON
− 0.1 V 200
mA
I
DD_GREEN
Operating Current in Green Mode V
DD
= 12 V (no switching) 350 500
mA
DRAIN VOLTAGE SENSING SECTION (V
D1
=V
D2
)
V
OSI
*
Comparator Input Offset Voltage −1 0 1 mV
I
OFFSET
*
I
OFFSET1
and I
OFFSET2
Maximum of adaptive offset
current (15 steps, 9 mA resolution)
I
OFFSET
=I
OFFSET_STEP15
112.5 135 157.5
mA
V
TH_ON
Turn-On Threshold
R
DRAIN
= 0 W (includes
comparator input offset voltage)
−290 −240 −190 mV
t
ON_DLY
*
Turn on delay for de-bounce time
when turn-on delay mode is disabled
by detecting normal SR current
From V
D1
falling below V
TH_ON
to
V
GATE
rising above V
G_HG
(With
50 mV overdrive), C
GATE
=0nF
80 ns
t
ON_DLY2_H
*
Turn on delay for de-bounce time
when turn-on delay mode is enabled
by detecting SR current inversion for
HC and HD version
From V
D1
falling below V
TH_ON
to
V
GATE
rising above V
G_HG
(With
50 mV overdrive), C
GATE
=0nF
850 ns
t
ON_DLY2_L
*
Turn on delay for de-bounce time
when turn-on delay mode is enabled
by detecting SR current inversion for
LC and LD version
From V
D1
falling below V
TH_ON
to
V
GATE
rising above V
G_HG
(With
50 mV overdrive), C
GATE
=0nF
1100 ns
V
TH_OFF1_C
*
First Level Turn-Off Threshold
for HC and LC version
R
DRAIN
= 0 W (includes
comparator input offset voltage)
25 mV
V
TH_OFF2_C
*
Second Level Turn-Off Threshold
for HC and LC version
R
DRAIN
= 0 W (includes
comparator input offset voltage)
50 mV
V
TH_OFF1_D
*
First Level Turn-Off Threshold
for HD and LD version
R
DRAIN
= 0 W (includes
comparator input offset voltage)
0 mV
V
TH_OFF2_D
*
Second Level Turn-Off Threshold
for HD and LD version
R
DRAIN
= 0 W (includes
comparator input offset voltage)
25 mV
t
OFF_DLY
*
Comparator Delay of V
TH_OFF1
From V
D1
rising above V
TH_OFF
to
V
GATE
falling below V
G_LW
(With
10 mV overdrive), C
GATE
=0nF
50 ns
V
TH_HGH
Drain Voltage High Detect Threshold V
D1
Rising 0.80 1 1.20 V
t
DB_HGH_H
*
V
TH_HGH
Detection Blanking Time for
HC and HD version
From V
D1
falling below V
TH_ON
540 ns
t
DB_HGH_L
*
V
TH_HGH
Detection Blanking Time for
LC and LD version
From V
D1
falling below V
TH_ON
1
ms
V
OFF_FORCE
*
Forced Turn-off Threshold V
D1
> V
OFF_FORCE
= V
TH_HGH_EN
1 V
MINIMUM ON-TIME AND MAXIMUM ON-TIME
K
TON
*
Adaptive Minimum On Time Ratio Ratio between t
ON_MIN
and SR
conduction time of previous
switching cycle
25 %
t
ON_MIN_LH
*
Minimum On-Time Lower Limit
for HC and HD version
t
ON_MIN_LH
< t
ON_MIN
<
t
ON_MIN_UH
200 ns
t
ON_MIN_UH
Minimum On-Time Upper Limit
for HC and HD version
0.96 1.2 1.44
ms
FAN6248HC/HD/LC/LD
www.onsemi.com
6
ELECTRICAL CHARACTERISTICS (V
DD
= 12 V and T
J
= −40°C to +125°C unless otherwise specified) (continued)
Symbol UnitMaxTypMinConditionsParameter
MINIMUM ON-TIME AND MAXIMUM ON-TIME
t
ON_MIN_LL
*
Minimum On-Time Lower Limit
for LC and LD version
t
ON_MIN_LL
< t
ON_MIN
<
t
ON_MIN_UL
0.4
ms
t
ON_MIN_UL
Minimum On-Time Upper Limit
for LD and LD version
3.2 4 4.8
ms
t
SR_CNDT_H
Minimum SR Conduction Time to
enable SR for HC and HD version
The duration from turn-on trigger
to V
DS
rising above V
TH_HGH
380 600 820 ns
t
SR_CNDT_L
Minimum SR Conduction Time to
enable SR for LC and LD version
The duration from turn-on trigger
to V
DS
rising above V
TH_HGH
0.85 1.2 1.65
ms
t
SR_MAX_H
*
Maximum SR Turn-on Time
for HC and HD version
15
ms
t
SR_MAX_L
*
Maximum SR Turn-on Time
for LC and LD version
30
ms
REGULATED DEAD TIME
t
DEAD_H
*
Dead time regulation target
for HC and HD version
From V
GATE
falling below V
G_LW
to V
DS
rising above V
TH_HGH
280 ns
t
DEAD_H_LIGHT
*
Dead time regulation target under
light load condition for HC and HD
version
From V
GATE
falling below V
G_LW
to V
DS
rising above V
TH_HGH
320 ns
t
DEAD_L
*
Dead time regulation target
for LC and LD version
From V
GATE
falling below V
G_LW
to V
DS
rising above V
TH_HGH
320 ns
t
DEAD_L_LIGHT
*
Dead time regulation target under
light load condition for LC and LD
version
From V
GATE
falling below V
G_LW
to V
DS
rising above V
TH_HGH
360 ns
t
TSDT
*
Too small dead time threshold to
speed up I
OFFSET
change
(Speed up 2 times)
From V
GATE
falling below V
G_LW
to V
DS
rising above V
TH_HGH
50 ns
K
INV
*
Adaptive SR current inversion
detection time Ratio between T
INV
and SR conduction time of previous
switching cycle
V
GATE
> V
G_HG
and V
DS
>
V
TH_OFF
K
INV
= 0.25 × K
TON
6.25 %
h
INV_EXT
*
Normal switching cycles without
capacitive current spike to exit SR
current inversion detection state
which has t
ON_DLY2
31 cycle
GREEN MODE CONTROL
t
GRN_ENT_H
Non-Switching Period to Enter Green
Mode for HC and HD version
Non switching cycles between
burst switching bundles
60 80 100
ms
t
GRN_ENT_L
Non-Switching Period to Enter Green
Mode for LC and LD version
Non switching cycles between
burst switching bundles
120 160 200
ms
t
GRN_ENT_DBNC_H
De-bounce time to Enter Green Mode
for HC and HD version
De-bounce time after t
GRN.ENT_H
130 180 230
ms
t
GRN_ENT_DBNC_L
De-bounce time to Enter Green Mode
for LC and LD version
De-bounce time after t
GRN_ENT_L
240 320 400
ms
t
GRN_EXT_H
Non-Switching Period to Exit Green
for HC and HD version
Non switching cycles between
burst switching bundles
30 40 50
ms
t
GRN_EXT_L
Non-Switching Period to Exit Green
Mode for LC and LD version
Non switching cycles between
burst switching bundles
60 80 100
ms
h
CSW_EXT
Continuous switching cycles to exit
Green Mode for HC, HD, LC and LD
version
4 7 10 cycle
P1-P3P4-P6P7-P9P10-P12P13-P15

FAN6248HCMX

Mfr. #:
Buy FAN6248HCMX
Manufacturer:
ON Semiconductor
Description:
Switching Controllers LLC SR CONTROLLER
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet