LT3462AES6#TRPBF

LT3462/LT3462A
3462af
4
OPERATIO
U
BLOCK DIAGRA
W
Figure 1. Block Diagram
+
+
+
+
1
3
2
V
OUT
V
OUT
D
R1 (EXTERNAL)
R2 (EXTERNAL)
FB
RAMP
GENERATOR
SHUTDOWN
BIAS CURRENT
CANCELLATION
1.2MHz*
OSCILLATOR
R
S
Q
A1
E AMP
A2
COMP
DRIVER
R
C
C
C
SW
Q1
0.1
GND
6
1.265V
REFERENCE
V
IN
FB
4
SDREF
SDREF
SDREF
3462 F02
5
*LT3462A IS 2.7MHz
C
S1
(EXTERNAL)
C
S2
(EXTERNAL)
Q2
OFF 3µA
ON 180µA
ISRC
SHUTDOWN
C
S1
,
C
S2
OPTIONAL SOFT-START COMPONENTS
DO
LG
The LT3462 uses a constant frequency, current mode
control scheme to provide excellent line and load regula-
tion. Operation can be best understood by referring to the
Block Diagram in Figure 1. At the start of each oscillator
cycle, the SR latch is set, turning on the power switch Q1.
A voltage proportional to the switch current is added to a
stabilizing ramp and the resulting sum is fed into the
positive terminal of the PWM comparator. When this
voltage exceeds the voltage at the output of the EAMP, the
SR latch is reset, turning off the power switch. The level
at the output of the EAMP is simply an amplified version
of the difference between the feedback voltage and GND.
In this manner, the error amplifier sets the correct peak
current level to keep the output in regulation. If the error
amplifier’s output increases, more current is taken from
the output; if it decreases, less current is taken. One
function not shown in Figure 1 is the current limit. The
switch current is constantly monitored and not allowed to
exceed the nominal value of 400mA. If the switch current
reaches 400mA, the SR latch is reset regardless of the
output state of the PWM comparator. This current limit cell
protects the power switch as well as various external
components connected to the LT3462.
SDREF is a dual function input pin. When driven low it
shuts the part down, reducing quiescent supply current to
less than 10µA. When not driven low, the SDREF pin has an
internal pull-up current that turns the regulator on. Once
the part is enabled, the SDREF pin sources up to
180µA nominally at a fixed voltage of 1.265V through
external resistor R2 to FB. If there is no fault condition
present, FB will regulate to 0V, and V
OUT
will regulate to
1.265V • (–R1/R2). An optional soft-start circuit uses the
fixed SDREF pull-up current and a capacitor from SDREF
to V
OUT
to set the dV/dt on V
OUT
. In shutdown, an FB bias
current cancellation circuit supplies up to 150µA biasing
current to external resistor R1 while V
OUT
is lower than FB.
This function eliminates R2 loading of SDREF during
shutdown. As a result, supply current in shutdown may
exceed 10µA by the amount of current flowing in R1.
LT3462/LT3462A
3462af
5
R2
R1
GND
C3
L1
L2
C1
V
OUT
V
IN
+
C4
C2
3462 F03
1
2
34
5
6
Inrush Current
The LT3462 has a built-in Schottky diode. When supply
voltage is applied to the V
IN
pin, the voltage difference
between V
IN
and V
D
generates inrush current flowing from
input through the inductor and the Schottky diode to
charge the flying capacitor to V
IN
. The maximum
nonrepetitive surge current the Schottky diode in the
LT3462 can sustain is 1.5A. The selection of inductor and
capacitor value should ensure the peak of the inrush
current to be below 1.5A. The peak inrush current can be
calculated as follows:
I
VO
L
C
L
C
P
IN
=
–.
exp
6
121
π
where L is the inductance between supply and SW, and C
is the capacitance between SW and D.
Table 3 gives inrush peak currents for some component
selections.
Table 3. Inrush Peak Current
V
IN
(V) L (µH) C (µF) I
P
(A)
5 22 1 0.70
5 33 1 0.60
12 47 1 1.40
Inductor Selection
Each of the two inductors used with LT3462 should have
a saturation current rating (where inductance is approxi-
mately 70% of zero current inductance ) of approximately
0.25A or greater. If the device is used in the charge pump
mode, where there is only one inductor, then its rating
should be 0.35A or greater. DCR of the inductors should
be less than 1. For LT3462, a value of 22µH is suitable
if using a coupled inductor such as Sumida CLS62-220. If
using two separate inductors, increasing the value to
47µH will result in the same ripple current. For LT3462A,
a value of 10µH for the coupled inductor and 22µH for two
inductors will be acceptable for most applications.
APPLICATIO S I FOR ATIO
WUUU
Figure 2. Suggested Layout
Capacitor Selection
Ceramic capacitors are recommended. An X7R or X5R
dielectric should be used to avoid capacitance decreasing
severely with applied voltage and at temperature limits.
The “flying” capacitor between the SW and D pins should
be a ceramic type of value 1µF or more. When used in the
dual inductor or coupled inductor topologies the flying
capacitor should have a voltage rating that is more than the
difference between the input and output voltages. For the
charge pump inverter topology, the voltage rating should
be more than the output voltage. The output capacitor
should be a ceramic type. Acceptable output capacitance
varies from 1µF for high V
OUT
(–36V), to 10µF for low V
OUT
(–5V). The input capacitor should be a 1µF ceramic type
and be placed as close as possible to the LT3462/LT3462A.
Layout Hints
The high speed operation of the LT3462 demands careful
attention to board layout. You will not get advertised
performance with careless layout. Figure 2 shows the
recommended component placement. A ceramic capaci-
tor of 1µF or more must be placed close to the IC for input
supply bypassing.
LT3462/LT3462A
3462af
6
TYPICAL APPLICATIO S
U
Li
+
to –8V Supply
–12V Efficiency
LOAD CURRENT (mA)
0
EFFICIENCY (%)
80
75
70
65
60
55
50
3462 TA02b
1052015 25 3530
T
A
= 25°C
V
IN
= 3.3V
3.3V to –12V with Soft-Start Circuit
V
IN
3.3V
L1
47µH
L2
47µH
R1
267k
R2
27.4k
C3
2.2µF
C
S1
100nF
22nF
C4
15pF
C1
4.7µF
C2
1µF
V
OUT
12V
30mA
V
IN
SW
FB
SDREF
GND
LT3462
C1: TAIYO YUDEN X5R JMK212BJ475MG
C2: TAIYO YUDEN X5R EMK212BJ105MG
C3: TAIYO YUDEN EMK316BJ225
L1, L2: MURATA LQH32CN470
3462 TA02a
OFF
M1
D
V
IN
2.7V
TO 4.2V
L1A
22µH
L1B
22µH
R1
267k
R2
42.2k
C3
4.7µF
C4
15pF
C1
4.7µF
C2
1µF
V
OUT
–8V
V
IN
SW
FB
SDREF
GND
LT3462
C1: TAIYO YUDEN X5R JMK212BJ475MG
C2: TAIYO YUDEN X5R EMK212BJ105MG
C3: TAIYO YUDEN LMK316BJ475
L1: SUMIDA CLS62-220 OR 2X MURATA LQH32CN330
3462 TA03a
D
LOAD CURRENT (mA)
0
EFFICIENCY (%)
3462 TA03b
20
3010 40
50
80
75
70
65
60
55
50
T
A
= 25°C
V
IN
= 3.3V
–8V Efficiency
2ms/DIV
I
IN
100mA/DIV
OFF
V
OUT
10V/DIV
3462 TA02c
V
OUT
Reaches –12V in 750µs; Input
Current Peaks at 300mA without C
S1
V
OUT
Reaches –12V in 7.5ms; Input
Current Peaks at 125mA with C
S1
= 100nF
2ms/DIV
I
IN
50mA/DIV
OFF
V
OUT
10V/DIV
3462 TA02d

LT3462AES6#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators 300mA, Inverting 2.7MHz DC/DC Converter
Lifecycle:
New from this manufacturer.
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