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XUP536150.000JS6I

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21
7©2018 Integrated Device Technology, Inc. June 25, 2018
XU Datasheet
Table 14. 2.5V AC Electrical Characteristics
V
DD
= 2.5V ±5%, T
A
= -20°C to +70°C; -40°C to +85°C, -40°C to +105°C.
Symbol Parameter Test Condition Minimum Typical Maximum Units
F Output Frequency Range
LVDS. 0.016 1350
MHz
LVPECL. 0.75 670
HCSL. 0.016 670
LVCMOS. 0.016 167
Frequency Stability
Temperature = -20°C to +70°C. ±20 ±100 ppm
Temperature = -40°C to +85°C. ±25 ±100 ppm
Temperature = -40°C to +105°C. ±50 ±100 ppm
Aging (1st year) T
A
= 25°C. ±3
Aging (10 years) T
A
= 25°C. ±10
Output Load
LVDS. Differential. 100
ΩLVPECL. V
DD
- 2.0V. 50
HCSL. To GND. 50
LVCMOS. To GND. 15 pF
T
ST
Start-up Time
Output valid time after V
DD
meets minimum
specified level.
10 ms
t
R
Output Rise Time
LVDS.
20% to 80% Vpk-pk.
300 400
psLVPECL. 250 630
HCSL. 315
LVCMOS. 10% to 90% V
DD.
3ns
t
F
Output Fall Time
LVDS.
80% to 20% Vpk-pk.
300 400
psLVPECL. 360 630
HCSL. 315
LVCMOS. 90% to 10% V
DD.
3ns
O
DC
Output Clock Duty Cycle
LVDS. 45 55
%
LVPECL.
F
OUT
< 156.25MHz. 45 55
F
OUT
< 156.25MHz. 40 60
HCSL. 45 55
LVCMOS.
F
OUT
< 62.5MHz. 45 55
F
OUT
> 62.5MHz. 40 60
T
OE
Output Enable/ Disable Time 100 ns
f
JITTER
Phase Jitter
(12kHz–20MHz)
LVDS. 400 500
fsec
LVPECL. 350 500
HCSL. 350 500
LVCMOS. F
OUT
= 100MHz. 350 500
8©2018 Integrated Device Technology, Inc. June 25, 2018
XU Datasheet
Table 15. 1.8V AC Electrical Characteristics
V
DD
= 1.8V ±5%, T
A
= -20°C to +70°C; -40°C to +85°C, -40°C to +105°C.
Symbol Parameter Test Condition Minimum Typical Maximum Units
F Output Frequency Range
LVDS. 0.016 1000
MHzLVPECL, HCSL. 0.016 670
LVCMOS. 0.016 125
Frequency Stability
Temperature = -20°C to +70°C. ±20 ±100 ppm
Temperature = -40°C to +85°C. ±25 ±100 ppm
Temperature = -40°C to +105°C. ±50 ±100 ppm
Aging (1st year) T
A
= 25°C. ±3
Aging (10 years) T
A
= 25°C. ±10
Output Load
LVDS. Differential. 100
Ω
LVPECL, HCSL. To GND. 50
LVCMOS. To GND. 10 pF
T
ST
Start-up Time
Output valid time after V
DD
meets minimum
specified level.
10 ms
t
R
Output Rise Time
LVDS.
20% to 80% Vpk-pk.
250 315
psLVPECL. 250 350
HCSL. 320
LVCMOS. 10% to 90% V
DD.
5ns
t
F
Output Fall Time
LVDS.
80% to 20% Vpk-pk.
250 315
psLVPECL. 250 350
HCSL. 320
LVCMOS. 90% to 10% V
DD.
5ns
O
DC
Output Clock Duty Cycle
LVDS.
F
OUT
< 156.25MHz. 45 55
%
F
OUT
< 156.25MHz. 40 60
LVPECL.
F
OUT
< 312.5MHz. 45 55
F
OUT
> 312.5MHz. 40 60
HCSL. 40 60
LVCMOS.
F
OUT
< 62.5MHz. 45 55
F
OUT
> 62.5MHz. 40 60
T
OE
Output Enable/ Disable Time 100 ns
f
JITTER
Phase Jitter
(12kHz–20MHz)
LVDS. 800 1200
fsec
LVPECL. 750 1200
HCSL. 100 1200
LVCMOS. F
OUT
= 100MHz. 800 1200
9©2018 Integrated Device Technology, Inc. June 25, 2018
XU Datasheet
Notes for all AC Electrical Characteristics tables:
1
A pull-up resistor from V
DD
to E/D enables output when pin 1 is left open.
2
Installation should include a 0.01μF bypass capacitor placed between VDD and GND to minimize power supply line noise.
3
Stability is inclusive of 25°C tolerance, operating temperature range, input voltage change, load change, aging, shock and vibration.
4
Standard LVCMOS frequencies include 10MHz, 12MHz, 12.288MHz, 16MHz, 20MHz, 24MHz, 24.576MHz, 25MHz, 33.333MHz, 40MHz, 48MHz,
50MHz, 100MHz, 125MHz and 156.25MHz.
5
Standard differential frequencies include 100MHz, 106.25MHz, 125MHz, 150MHz, 155.52MHz, 156.25MHz, 200MHz, 212.5MHz, 250MHz, 300MHz,
312.5MHz and 400MHz.
Output Waveforms
Figure 1. LVDS Output Waveforms
Oscillator Symmetry
Output Levels/Rise Time/Fall Time Measurements
OUTPUT 2
OUTPUT 1
OUTPUT 2
OUTPUT 1
V
OH
V
OL
V
OD
½ Period
Period
T
R
T
F
20% to 80%
V
OS
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21

XUP536150.000JS6I

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Description:
Standard Clock Oscillators LVPECL Crystal Osc 25ppm 3.3V 150Mhz
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