.0
NOTES
(1) All parameters measured at Tc=25 °C, nominal input voltage and full rated
load unless otherwise noted.
(2) Reduced output power available at 3.5 V input. Full output power is available
above 4.6 V input. See input voltage derating curve for more information.
(3) Noise measurement bandwidth is 0-20 MHz for peak-to-peak measurements,
10 kHz to 1 MHz for RMS measurements. Output noise is measured with a
1μF/35V Tantalum capacitor located 1" away from the converter to simulate
PCB standard decoupling.
(4) Short term stability is specified after a 30-minute warmup at full load, constant
line, and recording the drift over a 24-hour period.
(5) No minimum load required for operation. Dynamic regulation may degrade
when run with less than 5% load.
DFC6 Series Application Notes:
External Capacitance Requirements
No external capacitance is required for operation of the
DFC6 Series. To meet the reflected ripple requirements of
the converter, an input impedance of less than 0.15 Ohms
from DC to 200 kHz is required. If a capacitive input
source is farther than 1” from the converter, an additional
capacitor may be required at the input pins for
proper operation. External output capacitance is
not required for operation, however it is
recommended that 1 μF to 10 μF of tantalum
and 0.001 to 0.1 μF ceramic capacitance be
selected for reduced system noise. Additional
output capacitance may be added for increased
filtering, but should not exceed 400 μF.
Output Power
The available output power of the DFC6 Series
is reduced when operating below 4.6 volts. See
Input Voltage Derating curve. Below 4.6 volts the
output power is linearly derated from 100% at
4.6 volts to 50% at 3.5 volts.
Negative Outputs
A negative output voltage may be obtained by
connecting the +OUT to circuit ground and
connecting -OUT as the negative output.
