LTC4309
4
4309fa
TIMING DIAGRAMS
ENABLE and READY Timing
t
PLH_EN
ENABLE
CONNECT
READY
t
PLH_READY
t
PHL_READY
t
PHL_EN
4309 TD01
SDA/SCL Propagation Delays, Rise and Fall Times
t
PLH
SDAIN/SCLIN
SDAOUT/SCLOUT
t
PHL
t
RISE
t
FALL
t
RISE
t
FALL
4309 TD02
Figure 1. Timing Diagrams
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
THR(HYST)
SDA, SCL Logic Input Threshold Voltage
Hysteresis
(Note 3) 50 mV
C
IN
Digital Input Capacitance SDAIN,
SDAOUT, SCLIN, SCLOUT
(Note 3) 10 pF
I
LEAK
Input Leakage Current SDA, SCL, ACC, DISCEN Pins
l
±5 μA
V
OL
Output Low Voltage SDA, SCL Pins, I
SINK
= 4mA, Driven SDA/SCL = 0.2V, V
CC
=
V
CC2
= 2.7V
l
0 0.4 V
2.7k to V
CC
on SDA, SCL, Driven SDA/SCL = 0.1V,
V
CC
= V
CC2
= 3.3V
l
120 170 205 mV
V
ILMAX
Buffer Input Logic Low Voltage
l
1.2 V
Bus Stuck Low Timeout
t
TIMEOUT
Bus Stuck Low Timer SDAOUT, SCLOUT = OV
l
25 30 35 ms
V
OL_FAULT
FAULT Output Low Voltage I
FAULT
= 3mA
l
0.4 V
I
OFF_FAULT
FAULT Off Leakage Current
l
0.1 ±5 μA
The l denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at T
A
= 25°C. V
CC
= 3.3V, V
CC2
= 3.3V, unless otherwise noted.
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Test performed with connection circuity active.
Note 3: Determined by design, not subject to test.
Note 4: For larger equivalent bus capacitance, the skew increases, and
setup and hold times must be adjusted accordingly. Please see the
Operation Section of the datasheet.
Note 5: Measure points are 0.3 • V
CC
and 0.7 • V
CC
.
Note 6: All currents into pins are positive, all voltages are referenced to
GND, unless otherwise specifi ed.
Note 7: I
PULLUPAC
varies with temperature and V
CC
voltage as shown in the
Typical Performance Characteristics section.
ELECTRICAL CHARACTERISTICS
LTC4309
5
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I
CC
Enabled Current vs
Temperature
I
CC
Disabled Current vs
Temperature
I
CC2
Enabled Current vs
Temperature
I
CC2
Disabled Current vs
Temperature
Offset Voltage vs Pull-Up
Resistance
Input-Output High to Low
Propagation Delay vs Temperature
T
A
= 25°C, V
CC
= 3.3V, V
CC2
= 3.3V unless
otherwise noted.
TEMPERATURE (oC)
–50
I
CC
ENABLED CURRENT (mA)
6.5
7
7.5
25
75
4309 G02
6
5.5
5
–25 0 50
8
100
V
CC
= 5.5V
V
CC
= 3.3V
V
CC
= 2.3V
TEMPERATURE (°C)
–50
0
I
PULLUPAC
(mA)
4
8
12
–25
0
25 50
4309 G03
75
16
20
100
V
CC
= 5.5V
V
CC
= 3.3V
TEMPERATURE (oC)
–50
100
120
SUPPLY CURRENT (MA)
140
160
180
–25
0
25 50
4309 G04
75
200
220
100
V
CC
= 5.5V
V
CC
= 3.3V
V
CC
= 2.3V
Input-Output High to Low Propagation
Delay vs Output Capacitance
OUTPUT CAPACITANCE (pF)
0
PROPAGATION DELAY (ns)
90
70
100
110
120
130
140
150
160
80
200 400 600 800
4309 G08
1000
C
IN
= 50pF
R
PULLUPIN
= 2.7k7
R
PULLUPOUT
= 2.7k7
V
CC
= 5.5V
V
CC
= 3.3V
V
CC
= 2.3V
TEMPERATURE (oC)
–50
90
SUPPLY CURRENT (MA)
100
110
120
130
140
160
–25
02550
4309 G05
75 100
V
CC
= 5.5V
V
CC
= 3.3V
V
CC
= 2.3V
PULL-UP RESISTANCE (kΩ)
0
50
OFFSET VOLTAGE (mV)
58
70
62
66
54
46
4309 G09
2
8
10
V
OL
= 0.1V
C
IN =
C
OUT
= 50pF
R
PULLUPIN
= 2.7kΩ
TEMPERATURE (°C)
–50
PROPAGATION DELAY (ns)
140
120
110
100
90
80
70
60
50 75
4309 G06
–25 0 25 100
C
IN
= C
OUT
= 50pF
R
PULLUPIN
= R
PULLUPOUT
= 2.7kΩ
V
CC
= 5.5V
V
CC
= 3.3V
130
V
CC
= 2.3V
Boost Pull-Up Current vs
Temperature
TEMPERATURE (°C)
–50
BOOST PULL-UP CURRENT (mA)
30
25
20
15
10
5
0
50 75
4309 G07
–25 0 25 100
C
IN
= 50pF
C
OUT
= 1nF
R
PULLUPIN
= R
PULLUPOUT
= 2.7kΩ
V
CC
= 5.5V
V
CC
= 3.3V
V
CC
= 2.3V
TYPICAL PERFORMANCE CHARACTERISTICS
LTC4309
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ENABLE (Pin 1/Pin1): Connection Enable Input. This 1.4V
digital threshold input pin enables or disables the LTC4309.
For normal operation pull or connect ENABLE high. Driving
ENABLE below the 0.8V threshold isolates SDAIN from
SDAOUT, SCLIN from SCLOUT, asserts READY low, and
prohibits automatic clock and stop bit generation during a
fault condition. A rising edge on ENABLE after a fault has
occurred forces a connection between SDAIN, SDAOUT
and SCLIN, SCLOUT. Connect to V
CC
if unused.
DISCEN (Pin 2/Pin 3 ): Bus Stuck Low Disconnect Enable
Input. This pin, when high, allows the stuck low bus
timeout circuitry to disconnect the bus in a fault condition.
When connected to GND, this pin disables the circuitry
that disconnects the bus under a fault condition; however,
the FAULT pin will still go low.
SCLOUT (Pin 3/Pin 4): Serial Clock Output. Connect this
pin to a SCL bus segment where bus stuck low recovery is
desired. If the output rise time accelerators are enabled, a
pull-up resistor should be connected between this pin and
a bus supply greater than or equal to V
CC
. Bus supplies
can be lower than V
CC
if the output rise time accelerators
are disabled. See Application Information section for
detailed bus pull-up supply options.
SCLIN (Pin 4/Pin 5): Serial Clock Input. Connect this pin
to a SCL bus segment where isolation from bus stuck
low issues is desired. If the input rise time accelerator is
enabled, a pull-up resistor should be connected between
this pin and a bus supply greater than or equal to V
CC2
.
Bus supplies can be lower than V
CC2
if the input rise time
accelerators are disabled. See Application Information
section for detailed bus pull-up supply options.
ACC (Pin 5/Pin 6): Rise Time Accelerator Control Input.
This nominal 0.7V threshold input pin enables and disables
all rise time accelerators on the SDA and SCL pins. Connect
ACC to GND to enable all four rise time accelerators or
connect ACC to V
CC
to disable all four rise time accelerators.
Connect ACC to V
CC2
to GND to enable the accelerators
on SDAOUT and SCLOUT only.
GND (Pin 6/Pin 8): Device Ground. Connect this pin to a
ground plane for best results.
READY (Pin 7/Pin 9): Connection Ready Status Output.
This open-drain N-channel MOSFET pin pulls low when
ENABLE is low, when the start-up and connection sequence
described in the Operation section has not been completed,
or when the LTC4309 disconnects the input and output
pins due to a bus stuck low condition. READY goes high
when ENABLE is high and connection is made between the
input and output pins. Connect a pull-up resistor, typically
10k, from this pin to the bus pull-up supply. This pin can
be left open if unused.
FAULT (Pin 8/Pin 11): Bus Stuck Low Timeout Output. This
open drain N-channel MOSFET output pulls low after 30ms
when there is a bus stuck low condition on the output pins
of the LTC4309. In normal operation FAULT is high. Connect
a pull-up resistor, typically 10k, from this pin to the bus
pull-up supply. This pin can be left open if unused.
SDAIN (Pin 9/Pin 12): Serial Clock Input. Connect this
pin to a SDA bus segment where isolation from bus stuck
low issues is desired. If the input accelerator is enabled, a
pull-up resistor should be connected between this pin and
a bus supply greater than or equal to V
CC2
. Bus supplies
can be lower than V
CC2
if the input rise time accelerators
are disabled. See Application Information section for
detailed bus pull-up supply options.
SDAOUT (Pin 10/Pin 13): Serial Clock Output. Connect this
pin to a SCL bus segment where bus stuck low recovery is
desired. If the output rise time accelerators are enabled, a
pull-up resistor should be connected between this pin and
a bus supply greater than or equal to V
CC
. Bus supplies
can be lower than V
CC
if the output rise time accelerators
are disabled. See Application Information section for
detailed bus pull-up supply options.
V
CC2
(Pin 11/Pin 14): Supply Voltage Input for SDAIN and
SCLIN Rise Time Accelerator Circuitry. V
CC2
supplies the
rise time accelerator circuitry on the input side. Bypass
this pin to GND with a capacitor of at least 0.01μF and
place close to V
CC2
for best results. If V
CC2
is connected
to GND, the input side rise time accelerator circuitry is
disabled, regardless of ACC.
(DE12/GN16)
PIN FUNCTIONS

LTC4309CDE#PBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Interface - Signal Buffers, Repeaters Low Offset Hot Swappable Bus Buffer
Lifecycle:
New from this manufacturer.
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