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SFH6156-3

P1-P3P4-P6P7-P7
Option Information
www.vishay.com
Vishay Semiconductors
Rev. 2.0, 24-Aug-15
4
Document Number: 83713
For technical questions, contact: optocoupleranswers@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Notes
All voltages referred to are peak values except otherwise specified.
(1)
See time-test voltage diagram
(2)
In preparation
Testing input / output voltage requires all input pins and all output pins to be shorted
Option 1: Tested per DIN EN 60747-5-2 (VDE 0884) / DIN EN 60747-5-5 (pending)
Option 6: Wide lead spacing (10.16 mm creepage / clearance distances > 8 mm)
Option 7: Surface mount leads (creepage / clearance distances > 8 mm)
Option 8: Surface mount leads
Option 9: Surface mount leads
See CECC 00802, edition 1, for soldering conditions for SMT devices (option 7 and 9).
“-..” means dash selections
DESCRIPTION SYMBOL SYSTEM 4
(2)
SYSTEM 5 SYSTEM 7 UNIT
IL410 6N135 IL300
IL420 6N136 IL300E
IL4116 SFH6135 IL300F
IL4117 SFH6136 IL300EF
IL4118 6N138 IL300DEFG
IL4216 SFH6138
IL4217 SFH6139
IL4218 6N139
SFH6345
6N137...
VO2601...
VO2611...
VO2630...
VO2631...
VO4661...
Installation category (DIN VDE 0110)
For rated line voltages 300 V
RMS
I to IV I to IV I to IV
For rated line voltages 600 V
RMS
I to III I to IV I to IV
For rated line voltages 1000 V
RMS
IEC climatic category (DIN IEC 60068 Part 1/9.80) 55/100/21 55/100/21 55/100/21
Pollution degree (DIN VDE 0110 Part 1/1.89) 2 2 2
Maximum operation insulating voltage
(1)
V
IORM
890 890 890 V
peak
Test voltage input/output, procedure b
(1)
V
Pr
= 1.875 x V
IORM
, routine 100 % test, t
p
= 1 s,
partial discharge < 5 pC
V
Pr
1669 1669 1669 V
peak
Test voltage input/output, procedure a
(1)
V
Pr
= 1.6 x V
IORM
, type and sampling Test t
p
= 60 s,
partial discharge < 5 pC
V
Pr
1424 1424 1424 V
peak
Maximum permissible overvoltage (transient
overvoltage)
V
IOTM
8000 8000 8000 V
peak
Partial discharge test voltage
(1)
V
INITIAL
8000 8000 8000 V
peak
Safety maximum ratings
(maximum permissible ratings in case of a fault,
also refer to diagram)
Package temperature
Current
(input current I
F
, P
Si
= 0, T
A
= 25 °C)
Derating with higher ambient temperature
Power (output or total power dissipation, T
A
= 25 °C)
Derating with higher ambient temperature
T
si
I
si
DI
Si
P
Si
P
Si
175
250
-1.65
500
-3.33
175
300
-2
500
-3.33
165
235
-1.57
465
-3.1
°C
mA
mA/K
mW
mW/K
Insulation resistance at T
Si
V
I/O
= 500 V R
IS
> 10
9
> 10
9
> 10
9
W
Option Information
www.vishay.com
Vishay Semiconductors
Rev. 2.0, 24-Aug-15
5
Document Number: 83713
For technical questions, contact: optocoupleranswers@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
OPTION 6
DIP OPTOCOUPLERS WITH 0.4" (10.16 mm) LEAD SPREAD
The leads of the optocouplers are bent according to a
spacing of 0.4" (10.16 mm). Dimensions deviating from the
standard type are:
Lead spacing 10.16 mm (0.4")
Creepage distance > 8 mm
Clearance > 8 mm
This version additionally complies with the following
standards:
• IEC 60950 DIN VDE 0805/05 90 (System 2 and 3 only)
Reinforced insulation up to an operating voltage of 400
V
RMS
or DC
Clearance-creepage distance = 8 mm min.
See standard version for pin configuration
OPTION 7
LEAD BENDS FOR SURFACE MOUNT OPTOCOUPLERS
These optocouplers are suitable for surface mounting.
Dimensions deviating from the standard type are:
Creepage distance > 8 mm
Clearance distance > 8 mm
This version additionally complies with the following
standards:
• IEC 60950 DIN VDE 0805/05 90 (system 2 and 3 only)
Reinforced insulation up to an operating voltage of
400 V
RMS
or DC
During the soldering process, the package should not be
wetted with tin-lead solder to prevent the impairment of the
isolation features. Apart from iron soldering, only reflow
soldering methods (vapor phase, infrared and hot gas) are
permissible.
Permissible soldering conditions for SMD bending options:
please see reflow soldering profile.
The soldering process may be repeated two times at the
most. Attention must be paid to the cooling down of the
device to 25 °C between the soldering processes.
Clearance and creepage distances must be considered for
the solder pad design.
Clearance-creepage distance = 8 mm min.
See standard version for pin configuration.
20802-5
10.16 typ.
7.62 typ.
3.5 ± 0.3
2.55 ± 0.25
0.1 min.
8 min.
7.62 typ.
4.6
4.1
8.4 min.
10.3 max.
0.7 min.
DIP 6
DIP 4, DIP 8, DIP 16
8.41 min.
3.81
3.30
10.3 max.
0.90
0.51
7.62 typ.
11.0 max.
9.00 ± 0.15
12.30 ± 0.30
0.25 ± 0.05
0.75 ± 0.25
1.00 ± 0.15
10.16 min.
Lead
coplanarity:
max. 0.10
Wide Body, Option 7
Option Information
www.vishay.com
Vishay Semiconductors
Rev. 2.0, 24-Aug-15
6
Document Number: 83713
For technical questions, contact: optocoupleranswers@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
OPTION 8
LEAD BENDS FOR SURFACE MOUNT OPTOCOUPLERS
These optocouplers are suitable for surface mounting.
Dimensions deviating from the standard type are:
Creepage distance > 8 mm
Clearance distance > 8 mm
This version additionally complies with the following
standards:
• IEC 60950 DIN VDE 0805/05 90 (system 2 and 3 only)
Reinforced insulation up to an operating voltage of
400 V
RMS
or DC
During the soldering process, the package should not be
wetted with tin-lead solder to prevent the impairment of the
isolation features. Apart from iron soldering, only reflow
soldering methods (vapor phase, infrared and hot gas) are
permissible.
Permissible soldering conditions for SMD bending options:
please see reflow soldering profile.
The soldering process may be repeated two times at the
most. Attention must be paid to the cooling down of the
device to 25 °C between the soldering processes.
Clearance and creepage distances must be considered for
the solder pad design.
Clearance-creepage distance = 8 mm min.
See standard version for pin configuration.
OPTION 9
LEAD BENDS FOR SURFACE MOUNT OPTOCOUPLERS
During the soldering process, the package should not be
wetted with tin-lead solder to prevent the impairment of the
isolation features. Apart from iron soldering, only reflow
soldering methods (vapor phase, infrared and hot gas) are
permissible.
Permissible soldering conditions for SMD bending options:
please see reflow soldering profile.
The soldering process may be repeated two times at the
most. Attention must be paid to the cooling down of the
device to 25 °C between the soldering processes.
DIP 4
DIP 6
7.62 typ.
3.81
3.30
12 max.
9.27 min.
12 max.
9.27 min.
0.50
0.00
7.62 typ.
3.81
3.30
0.50
0.00
17932-1
0.51
1.02
7.62 ref.
9.53
10.03
0.30 typ.
0.102
0.249
15° max.
17933-1
P1-P3P4-P6P7-P7

SFH6156-3

Mfr. #:
Buy SFH6156-3
Manufacturer:
Vishay Semiconductors
Description:
Transistor Output Optocouplers Phototransistor Out Single CTR 100-200%
Lifecycle:
New from this manufacturer.
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