LT1801/LT1802
8
18012fc
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
OS
TC Input Offset Voltage Drift (Note 8)
l
1.5 5 μV/°C
I
B
Input Bias Current V
CM
= V
S
–
+ 1V
V
CM
= V
S
+
– 0.2V
l
l
50
450
400
2250
nA
nA
Input Bias Current Match
(Channel-to-Channel) (Note 9)
V
CM
= V
S
–
+ 1V
V
CM
= V
S
+
– 0.2V
l
l
25
25
450
700
nA
nA
I
OS
Input Offset Current V
CM
= V
S
–
+ 1V
V
CM
= V
S
+
– 0.2V
l
l
25
25
350
350
nA
nA
A
VOL
Large-Signal Voltage Gain V
O
= –4V to 4V, R
L
= 1k
V
O
= –1V to 1V, R
L
= 100Ω
l
l
12.5
2
55
5
V/mV
V/mV
CMRR Common Mode Rejection Ratio V
CM
= V
S
–
to 3.5V
l
81 104 dB
CMRR Match (Channel-to-Channel) (Note 9) V
CM
= V
S
–
to 3.5V
l
75 104 dB
Input Common Mode Range
l
V
S
–
V
S
+
V
PSRR Power Supply Rejection Ratio V
S
+
= 2.5V to 10V, V
S
–
= 0V
l
73 90 dB
PSRR Match (Channel-to-Channel) (Note 9) V
S
+
= 2.5V to 10V, V
S
–
= 0V
l
67 90 dB
V
OL
Output Voltage Swing Low (Note 7) No Load
I
SINK
= 5mA
I
SINK
= 10mA
l
l
l
20
110
180
100
275
400
mV
mV
mV
V
OH
Output Voltage Swing High (Note 7) No Load
I
SOURCE
= 5mA
I
SOURCE
= 10mA
l
l
l
30
150
300
110
350
700
mV
mV
mV
I
SC
Short-Circuit Current
l
12.5 30 mA
I
S
Supply Current per Amplifi er
l
2.6 4.5 mA
GBW Gain Bandwidth Product Frequency = 2MHz
l
65 MHz
SR Slew Rate A
V
= –1, R
L
= 1k, V
O
= ±4V,
Measured at V
O
= ±2V
l
15 V/μs
The l denotes the specifi cations which apply over the temperature range
of – 40°C < T
A
< 85°C. V
S
= ±5V, V
CM
= 0V, V
OUT
= 0V, unless otherwise noted. (Note 5)
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The inputs are protected by back-to-back diodes. If the differential
input voltage exceeds 1.4V, the input current should be limited to less than
10mA. It is not 100% tested.
Note 3: A heat sink may be required to keep the junction temperature
below the absolute maximum rating when the output is shorted
indefi nitely.
Note 4: The LT1801C/LT1801I and LT1802C/LT1802I are guaranteed
functional over the temperature range of –40°C to 85°C.
Note 5: The LT1801C/LT1802C are guaranteed to meet specifi ed
performance from 0°C to 70°C. The LT1801C/LT1802C are designed,
characterized and expected to meet specifi ed performance from
–40°C to 85°C but are not tested or QA sampled at these temperatures.
The LT1801I/LT1802I are guaranteed to meet specifi ed performance from
–40°C to 85°C.
Note 6: Minimum supply voltage is guaranteed by power supply rejection
ratio test.
Note 7: Output voltage swings are measured between the output and
power supply rails.
Note 8: This parameter is not 100% tested.
Note 9: Matching parameters are the difference between amplifi ers A
and D and between B and C on the LT1802; between the two amplifi ers
on the LT1801.
Note 10: Thermal resistance (θ
JA
) varies with the amount of PC board
metal connected to the package. The specifi ed values are for short
traces connected to the leads. If desired, the thermal resistance can be
substantially reduced by connecting Pin 4 of the SO-8 and MS8, Pin 11 of
the SO-14 or the underside metal of the DD package to a larger metal area
(V
S
–
trace).
