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IDTCV149PAG8

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P17
COMMERCIAL TEMPERATURE RANGE
4
IDTCV149
PROGRAMMABLE FLEXPC™ CLOCK FOR AMD K8 PROCESSOR ATI RS480
INDEX BLOCK WRITE PROTOCOL
Bit # of bits From Description
1 1 Master Start
2-9 8 Master D2h
10 1 Slave Ack (Acknowledge)
11-18 8 Master Register offset byte (starting byte)
19 1 Slave Ack (Acknowledge)
20-27 8 Master Byte count, N (0 is not valid)
28 1 Slave Ack (Acknowledge)
29-36 8 Master first data byte (Offset data byte)
37 1 Slave Ack (Acknowledge)
38-45 8 Master 2nd data byte
46 1 Slave Ack (Acknowledge)
:
Master Nth data byte
Slave Acknowledge
Master Stop
INDEX BLOCK READ PROTOCOL
Master can stop reading any time by issuing the stop bit without waiting
until Nth byte (byte count bit30-37).
Bit # of bits From Description
1 1 Master Start
2-9 8 Master D2h
10 1 Slave Ack (Acknowledge)
11-18 8 Master Register offset byte (starting byte)
19 1 Slave Ack (Acknowledge)
20 1 Master Repeated Start
21-28 8 Master D3h
29 1 Slave Ack (Acknowledge)
30-37 8 Slave Byte count, N (block read back of N
bytes), power on is 8
38 1 Master Ack (Acknowledge)
39-46 8 Slave first data byte (Offset data byte)
47 1 Master Ack (Acknowledge)
48-55 8 Slave 2nd data byte
Ack (Acknowledge)
:
Master Ack (Acknowledge)
Slave Nth data byte
Not acknowledge
Master Stop
INDEX BYTE WRITE
Setting bit[11:18] = starting address, bit[20:27] = 01h.
INDEX BYTE READ
Setting bit[11:18] = starting address. After reading back the first data byte,
master issues Stop bit.
SM PROTOCOL
COMMERCIAL TEMPERATURE RANGE
IDTCV149
PROGRAMMABLE FLEXPC™ CLOCK FOR AMD K8 PROCESSOR ATI RS480
5
BYTE 0
Bit Output(s) Affected Description/Function 0 1 Type Power On
7 SRCT7, SRCC7 Output enable Tristate Enable RW 1
6 SRCT6, SRCC6 Output enable Tristate Enable RW 1
5 SRCT5, SRCC5 Output enable Tristate Enable RW 1
4 SRCT4, SRCC4 Output enable Tristate Enable RW 1
3 SRCT3, SRCC3 Output enable Tristate Enable RW 1
2 SRCT2, SRCC2 Output enable Tristate Enable RW 1
1 SRCT1, SRCC1 Output enable Tristate Enable RW 1
0 SRCT0, SRCT0 Output enable Tristate Enable RW 1
BYTE 2
Bit Output(s) Affected Description / Function 0 1 Type Power On
7 PCI0 Output enable Tristate Enable RW 1
6 Reserved RW 0
5 PCI0 SEL1 see PCI select table RW 0
4 PCI0 SEL0 RW 0
3 Reserved RW 0
2 SRCs SRCT PWRDWN drive mode Driven in power down Tristate in power down RW 0
1 CPUT1 CPUT1 PWRDWN drive mode Driven in power down Tristate in power down RW 0
0 CPUT0 CPUT0 PWRDWN drive mode Driven in power down Tristate in power down RW 0
BYTE 1
Bit Output(s) Affected Description/Function 0 1 Type Power On
7 USB48 Output enable Tristate Enable RW 1
6 REF2 Output enable Tristate Enable RW 1
5 REF1 Output enable Tristate Enable RW 1
4 REF0 Output enable Tristate Enable RW 1
3 24_48MHz Output enable Tristate Enable RW 1
2 CPUT1, CPUC1 Output enable Tristate Enable RW 1
1 CPUT0, CPUC0 Output enable Tristate Enable RW 1
0 HTT66 Output enable Tristate Enable RW 1
BYTE 3
Bit Output(s) Affected Description / Function 0 1 Type Power On
7 SRC7 CLKREQ0# CLKREQ1# RW 0
6 SRC6 CLKREQ0# CLKREQ1# RW 0
5 SRC5 Controlled by CLKREQB# CLKREQ0# CLKREQ1# RW 0
4 SRC4 or CLKREQA# CLKREQ0# CLKREQ1# RW 0
3 SRC3 CLKREQ0# CLKREQ1# RW 0
2 Reserved RW 0
1 Reserved RW 0
0 SRC0 Controlled by CLKREQB# CLKREQ0# CLKREQ1# RW 0
or CLKREQA#
COMMERCIAL TEMPERATURE RANGE
6
IDTCV149
PROGRAMMABLE FLEXPC™ CLOCK FOR AMD K8 PROCESSOR ATI RS480
BYTE 7
Bit Output(s) Affected Description / Function 0 1 Type Power On
7 Revision ID R 0
6 Revision ID R 0
5 Revision ID R 0
4 Revision ID R 0
3 Vendor ID R 0
2 Vendor ID R 1
1 Vendor ID R 0
0 Vendor ID R 1
BYTE 6
Bit Output(s) Affected Description / Function 0 1 Type Power On
7 Reserve RW 0
6 SRC0, SR[7:3], SMC2 SRC0, SRC[7:3] SSC control RW 0
5 SRC0, SR[7:3], SMC1 (see SMC table) RW 0
4 SRC0, SR[7:3], SMC0 RW 0
3 Reserved RW 0
2 SRC[2:1], SMC2 RW 0
1 SRC[2:1], SMC1 SRC[2:1] control (see SMC table) RW 0
0 SRC[2:1], SMC0 RW 0
BYTE 4
BYTE 5
Bit Output(s) Affected Description / Function 0 1 Type Power On
7 HTT66 HTT66 strength selection RW 1
6 HTT66 RW 0
5 PCIStrC1 PCI strength selection RW 1
4 PCIStrC0 RW 0
3 REFStr1 REF strength selection RW 1
2 REFStr0 RW 0
1 48MHStr1 USB48MHz strength selection RW 1
0 48MHzStr0 RW 0
Bit Output(s) Affected Description / Function 0 1 Type Power On
7 SRC7 Not Controlled Controlled RW 0
6 SRC6 Not Controlled Controlled RW 0
5 SRC5 When CLKREQ is HIGH, Not Controlled Controlled RW 0
4 SRC4 Output is Hi-Z Not Controlled Controlled RW 0
3 SRC3 Not Controlled Controlled RW 0
2 Reserved RW 0
1 Reserved RW 0
0 SRC0 When CLKREQ is HIGH, Not Controlled Controlled RW 0
Output is Hi-Z
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P17

IDTCV149PAG8

Mfr. #:
Buy IDTCV149PAG8
Manufacturer:
Description:
IC FLEXPC CLK PROGR K8 56-TSSOP
Lifecycle:
New from this manufacturer.
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