NCV7517
http://onsemi.com
22
APPLICATION GUIDELINES
General
Unused DRN
X
inputs should be connected to V
CC1
to
prevent false open load faults. Unused parallel inputs
should be connected to GND and unused enable inputs
should be connected to V
CC1
. The mask bit for each unused
channel should be `set' (see Table 5) to prevent activation
of the flags and the user's software should be designed to
ignore fault information for unused channels. For best
shorted-load detection accuracy, the external MOSFET
source terminals should be star-connected and the
NCV7517's GND pin, and the lower resistor in the fault
reference voltage divider should be Kelvin connected to
the star (see Figures 2 and 13).
Consideration of auto-retry fault recovery behavior is
necessary from a power dissipation viewpoint (for both the
NCV7517 and the MOSFETs) and also from an EMI
viewpoint.
Driver slew rate and turn-on/off symmetry can be
adjusted externally to the NCV7517 in each channel's gate
circuit by the use of series resistors for slew control, or
resistors and diodes for symmetry. Any benefit of EMI
reduction by this method comes at the expense of increased
switching losses in the MOSFETs.
The channel fault blanking timers must be considered
when choosing external components (MOSFETs, slew
control resistors, etc.) to avoid false faults. Component
choices must ensure that gate circuit charge/discharge
times stay within the turn-on/turn-off blanking times.
The NCV7517 does not have integral drain-gate flyback
clamps. Clamp MOSFETs, such as ON Semiconductor's
NID9N05CL, are recommended when driving unclamped
inductive loads. This flexibility allows choice of MOSFET
clamp voltages suitable to each application.
DRN
X
Feedback Resistor
Each DRN
X
feedback input has a clamp to keep the
applied voltage below the breakdown voltage of the
NCV7517. An external series resistor (R
DX
) is required
between each DRN
X
input and MOSFET drain. Channels
may be clamped sequentially or simultaneously but total
clamp power is limited to the maximum allowable junction
temperature.
To limit power in the DRN
X
input clamps and to ensure
proper open load or short to GND detection, the R
DX
resistor must be dimensioned according to the following
constraint equations:
R
DX(MIN)
+
V
PK
-V
CL(MIN)
I
CL(MAX)
(eq. 2)
R
DX(MAX)
+
V
SG
-
|
V
OS
|
|
I
SG
|
(eq. 3)
where V
PK
is the peak transient drain voltage, V
CL
is the
DRN
X
input clamp voltage, I
CL(MAX)
is the input clamp
current, and V
SG
and I
SG
are the respective short to GND
fault detection voltage and diagnostic current, and V
OS
is
the allowable offset (1.0 V max) between the NCV7517's
GND and the short.
Once R
DX
is chosen, the open load and short to GND
detection resistances in the application can be predicted:
R
OL
w
V
LOAD
-V
OL
I
OL
* R
DX
(eq. 4)
R
SG
v
R
LOAD
(V
SG
" V
OS
-
|
I
SG
|
R
DX
)
V
LOAD
-V
SG
)
|
I
SG
|
(R
DX
) R
LOAD
)
(eq. 5)
Using the data sheet values for V
CL(MIN)
= 27 V,
I
CL(MAX)
= 10 mA, and choosing V
PK
= 55 V as an
example, Equation 2 evaluates to 2.8 kW minimum.
Choosing V
CC1
= 5.0 V and using the typical data sheet
values for V
SG
= 30%V
CC1
, I
SG
= 20 mA, and choosing
V
OS
= 0, Equation 3 evaluates to 75 kW maximum.
Selecting R
DX
= 6.8 kW "5%, V
CC1
= 5.0 V, V
LOAD
=
12.0 V, V
OS
= 0 V, R
LOAD
= 555 W, and using the typical
data sheet values for V
OL
, I
OL
, V
SG
, and I
SG
, Equation 4
predicts an open load detection resistance of 130.7 kW and
Equation 5 predicts a short to GND detection resistance of
71.1 W. When R
DX
and the data sheet values are taken to
their extremes, the open load detection range is 94.1 kW v
R
OL
v 273.5 kW, and the short to GND detection range is
59.2 W v R
SG
v 84.4 W.
