16
LTC3830/LTC3830-1
3830fa
The output capacitor in a buck converter under steady-
state conditions sees much less ripple current than the
input capacitor. Peak-to-peak current is equal to inductor
ripple current, usually 10% to 40% of the total load
current. Output capacitor duty places a premium not on
power dissipation but on ESR. During an output load
transient, the output capacitor must supply all of the
additional load current demanded by the load until the
LTC3830 adjusts the inductor current to the new value.
ESR in the output capacitor results in a step in the output
voltage equal to the ESR value multiplied by the change in
load current. An 5A load step with a 0.05Ω ESR output
capacitor results in a 250mV output voltage shift; this is
7.6% of the output voltage for a 3.3V supply! Because of
the strong relationship between output capacitor ESR and
output load transient response, choose the output capaci-
tor for ESR, not for capacitance value. A capacitor with
suitable ESR will usually have a larger capacitance value
than is needed to control steady-state output ripple.
Electrolytic capacitors rated for use in switching power
supplies with specified ripple current ratings and ESR can
be used effectively in LTC3830 applications. OS-CON
electrolytic capacitors from Sanyo and other manufactur-
ers give excellent performance and have a very high
performance/size ratio for electrolytic capacitors. Surface
mount applications can use either electrolytic or dry
tantalum capacitors. Tantalum capacitors must be surge
tested and specified for use in switching power supplies.
Low cost, generic tantalums are known to have very short
lives followed by explosive deaths in switching power
supply applications. Other capacitors that can be used
include the Sanyo POSCAP and MV-WX series.
A common way to lower ESR and raise ripple current
capability is to parallel several capacitors. A typical
LTC3830 application might exhibit 5A input ripple cur-
rent. Sanyo OS-CON capacitors, part number 10SA220M
(220µF/10V), feature 2.3A allowable ripple current at
85°C; three in parallel at the input (to withstand the input
ripple current) meet the above requirements. Similarly,
Sanyo POSCAP 4TPB470M (470µF/4V) capacitors have
a maximum rated ESR of 0.04Ω; three in parallel lower
the net output capacitor ESR to 0.013Ω.
Feedback Loop Compensation
The LTC3830 voltage feedback loop is compensated at the
COMP pin, which is the output node of the error amplifier.
The feedback loop is generally compensated with an RC +
C network from COMP to GND as shown in Figure 10a.
Loop stability is affected by the values of the inductor, the
output capacitor, the output capacitor ESR, the error
amplifier transconductance and the error amplifier com-
pensation network. The inductor and the output capacitor
create a double pole at the frequency:
fLC
LC O OUT
= π
[]
12/ ( )( )
The ESR of the output capacitor and the output capacitor
value form a zero at the frequency:
f ESR C
ESR OUT
= π
[]
12/ ( )( )
The compensation network used with the error amplifier
must provide enough phase margin at the 0dB crossover
frequency for the overall open-loop transfer function. The
zero and pole from the compensation network are:
f
Z
= 1/[2π(R
C
)(C
C
)] and
f
P
= 1/[2π(R
C
)(C1)] respectively
APPLICATIO S I FOR ATIO
WUUU
3830 F10a
LTC3830
V
REF
R1
SENSE
–
R2
C2
SENSE
+
–
+
5
V
FB
6
COMP
10
7
C1
C
C
R
C
ERR
Figure 10a. Compensation Pin Hook-Up
