10
FN6040.1
July 8, 2005
High Data Rates
The ISL83387E maintains the RS-232 ±5V minimum
transmitter output voltages even at high data rates. Figure 9
details a transmitter loopback test circuit, and Figure 10
illustrates the loopback test result at 120kbps. For this test,
all transmitters were simultaneously driving RS-232 loads in
parallel with 1000pF, at 120kbps. Figure 11 shows the
loopback results for a single transmitter driving 1000pF and
an RS-232 load at 250kbps. The static transmitters were
also loaded with an RS-232 receiver.
Interconnection with 3V and 5V Logic
Standard 3.3V powered RS-232 devices interface well with
3V and 5V powered TTL compatible logic families (e.g., ACT
and HCT), but the logic outputs (e.g., R
OUTS
) fail to reach
the V
IH
level of 5V powered CMOS families like HC, AC, and
CD4000. The ISL83387E V
L
supply pin solves this problem.
By connecting V
L
to the same supply (1.8V to 5V) powering
the logic device, the ISL83387E logic outputs will swing from
GND to the logic V
CC
.
±15kV ESD Protection
All pins on the 3V interface devices include ESD protection
structures, but the ISL83387E incorporates advanced
structures which allow the RS-232 pins (transmitter outputs
and receiver inputs) to survive ESD events up to ±15kV. The
RS-232 pins are particularly vulnerable to ESD damage
because they typically connect to an exposed port on the
exterior of the finished product. Simply touching the port
pins, or connecting a cable, can cause an ESD event that
might destroy unprotected ICs. These new ESD structures
protect the device whether or not it is powered up, protect
FIGURE 9. TRANSMITTER LOOPBACK TEST CIRCUIT
FIGURE 8. TRANSMITTER OUTPUTS WHEN EXITING
POWERDOWN
TIME (20µs/DIV.)
T1
2V/DIV
5V/DIV
V
CC
= +3.3V
C1 - C4 = 0.1µF
T2
FORCEOFF
ISL83387E
V
CC
C
1
C
2
C
4
C
3
+
+
+
+
1000pF
V+
V-
5K
T
IN
R
OUT
C1+
C1-
C2+
C2-
R
IN
T
OUT
+
V
CC
0.1µF
V
CC
FORCEOFF
FORCEON
V
L
FIGURE 10. LOOPBACK TEST AT 120kbps
FIGURE 11. LOOPBACK TEST AT 250kbps
T1
IN
T1
OUT
R1
OUT
5µs/DIV.
V
CC
= +3.3V
5V/DIV.
C1 - C4 = 0.1µF
T1
IN
T1
OUT
R1
OUT
2µs/DIV.
5V/DIV.
V
CC
= +3.3V
C1 - C4 = 0.1µF
ISL83387E
11
FN6040.1
July 8, 2005
without allowing any latchup mechanism to activate, and
don’t interfere with RS-232 signals as large as ±25V.
Human Body Model (HBM) Testing
As the name implies, this test method emulates the ESD
event delivered to an IC during human handling. The tester
delivers the charge through a 1.5k current limiting resistor,
making the test less severe than the IEC61000 test which
utilizes a 330 limiting resistor. The HBM method
determines an ICs ability to withstand the ESD transients
typically present during handling and manufacturing. Due to
the random nature of these events, each pin is tested with
respect to all other pins. The RS-232 pins on “E” family
devices can withstand HBM ESD events to ±15kV.
IEC61000-4-2 Testing
The IEC61000 test method applies to finished equipment,
rather than to an individual IC. Therefore, the pins most likely to
suffer an ESD event are those that are exposed to the outside
world (the RS-232 pins in this case), and the IC is tested in its
typical application configuration (power applied) rather than
testing each pin-to-pin combination. The lower current limiting
resistor coupled with the larger charge storage capacitor yields
a test that is much more severe than the HBM test. The extra
ESD protection built into this device’s RS-232 pins allows the
design of equipment meeting level 4 criteria without the need
for additional board level protection on the RS-232 port.
AIR-GAP DISCHARGE TEST METHOD
For this test method, a charged probe tip moves toward the IC
pin until the voltage arcs to it. The current waveform delivered
to the IC pin depends on approach speed, humidity,
temperature, etc., so it is difficult to obtain repeatable results.
The “E” device RS-232 pins withstand ±15kV air-gap
discharges.
CONTACT DISCHARGE TEST METHOD
During the contact discharge test, the probe contacts the
tested pin before the probe tip is energized, thereby
eliminating the variables associated with the air-gap
discharge. The result is a more repeatable and predictable
test, but equipment limits prevent testing devices at voltages
higher than ±8kV. All “E” family devices survive ±8kV contact
discharges on the RS-232 pins.
Typical Performance Curves V
CC
= V
L
= 3.3V, T
A
= 25
o
C
FIGURE 12. TRANSMITTER OUTPUT VOLTAGE vs LOAD
CAPACITANCE
FIGURE 13. SLEW RATE vs LOAD CAPACITANCE
-6.0
-4.0
-2.0
0
2.0
4.0
6.0
1000 2000 3000 4000 50000
LOAD CAPACITANCE (pF)
TRANSMITTER OUTPUT VOLTAGE (V)
1 TRANSMITTER AT 250kbps
V
OUT
+
V
OUT
-
OTHER TRANSMITTERS AT 30kbps
LOAD CAPACITANCE (pF)
SLEW RATE (V/µs)
0 1000 2000 3000 4000 5000
-SLEW
+SLEW
5
10
15
20
25
30
ISL83387E
12
FN6040.1
July 8, 2005
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP)
GND
TRANSISTOR COUNT
ISL83387E: 1063
PROCESS
Si Gate CMOS
FIGURE 14. SUPPLY CURRENT vs LOAD CAPACITANCE
WHEN TRANSMITTING DATA
FIGURE 15. SUPPLY CURRENT vs SUPPLY VOLTAGE
FIGURE 16. V
L
SUPPLY CURRENT vs V
L
VOLTAGE
Typical Performance Curves V
CC
= V
L
= 3.3V, T
A
= 25
o
C (Continued)
10
15
20
25
30
45
35
40
0
1000
2000
3000
4000
5000
LOAD CAPACITANCE (pF)
SUPPLY CURRENT (mA)
20kbps
250kbps
120kbps
SUPPLY CURRENT (mA)
2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
0
0.5
1.0
1.5
2.0
SUPPLY VOLTAGE (V)
2.5
3.0
3.5
NO LOAD
ALL OUTPUTS STATIC
I
L
(A)
V
L
(V)
NO LOAD
ALL OUTPUTS STATIC
2.0 3.0 3.5 4.0 4.5 5.0 5.5 6.02.5 6.5 7.0
1n
10n
100n
1µ
10µ
100µ
10m
1m
V
CC
= 3.3V
V
L
V
CC
V
L
> V
CC
ISL83387E

ISL83387EIVZ

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
RS-232 Interface IC W/ANNEAL RS232 3V 3D /3R 15KV SHTDWN 24LD
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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