87158AGLFT Datasheet 87158AGLFT, 87158AFLF, 87158AFLFT | P1-P3

87158AG www.idt.com REV. C JULY 25, 2010

ICS87158

1-TO-6, LVPECL-TO-HCSL/LVCMOS

÷1, ÷2, ÷4 CLOCK GENERATOR

GENERAL DESCRIPTION

The ICS87158 is a high performance 1-to-6 LVPECL-to-

HCSL/LVCMOS ClockGenerator. The ICS87158 has one

differential input (which can accept LVDS, LVPECL, LVHSTL,

SSTL, HCSL), six differential HCSL output pairs and two

complementary LVCMOS/LVTTLoutputs. The six HCSL

output pairs can be individually configured for divide-by-1, 2,

and 4 or high impedance by use of select pins. The two

complementary LVCMOS/LVTTL outputs can be configured

for divide by 2, divide by 4, high impedance, or driven low for

low power operation.

The primary use of the ICS87158 is in Intel

E8870 chipsets

that use Intel

Pentium 4 processors. The ICS87158 converts

the differential clock from the main system clock into HCSL

clocks used by Intel

Pentium 4 processors. However, the

ICS87158 is a highly flexible, general purpose device that

operates up to 600MHz and can be used in any situation where

Differential-to-HCSL translation is required.

FEATURES

• Six HCSL outputs

• Two LVCMOS/LVTTL outputs

• One Differential LVPECL clock input pair

• PCLK, nPCLK supports the following input types:

LVDS, LVPECL, LVHSTL, SSTL, HCSL

• Maximum output frequency: 600MHz (maximum)

• Output skew: 100ps (maximum)

• Propagation delay: 4ns (maximum)

• 3.3V operating supply

• 0°C to 85°C ambient operating temperature

• Available in both standard and lead-free RoHS compliant

packages

• Industrial temperature information available upon request

BLOCK DIAGRAM PIN ASSIGNMENT

GND

VDD_R

PCLK

nPCLK

GND_R

VDD_M

MREF

nMREF

GND_M

GND

DD_L

GND_L

SEL_T

MULT_0

MULT_1

VDD_L

GND_L

SEL_A

SEL_B

SEL_U

PWR_DWN#

GND_H

DD_H

HOST_P1

HOST_N1

GND_H

HOST_P2

HOST_N2

DD_H

HOST_P3

HOST_N3

GND_H

HOST_P4

HOST_N4

DD_H

HOST_P5

HOST_N5

GND_H

HOST_P6

HOST_N6

DD_H

IREF

GND_I

DD_I

48-Lead TSSOP

6.1mm x 12.5mm x .92mm body package

G Package

Top View

48-Lead SSOP

7.5mm x 15.9mm x 2.3mm body package

F Package

Top View

HOST_P1

HOST_N1

GND_H

HOST_P6

HOST_N6

GND_H

HOST_P2

HOST_N2

GND_H

HOST_P3

HOST_N3

GND_H

HOST_P4

HOST_N4

GND_H

HOST_P5

HOST_N5

GND_H

MREF

nMREF

GND_H

CURRENT

ADJUST

÷1,2,4

MULT_0

MULT_1

IREF

PWR_DWN#

SEL_T

PCLK

nPCLK

SEL_A

SEL_B

SEL_U

DIVIDER

CONTROL

▲

÷1,2,4

÷2,4

87158AG www.idt.com REV. C JULY 25, 2010

ICS87158

1-TO-6, LVPECL-TO-HCSL/LVCMOS

÷1, ÷2, ÷4 CLOCK GENERATOR

TABLE 1. PIN DESCRIPTIONS

rebmuNemaNepyTnoitpircseD

21,1DNGrewoP.dnuorgylppusrewoP

84,41,11,2V

rewoP.snipylppusevitisoP

R_rewoP .stupnikcolcecnereferlaitnereffidrofnipylppusrewoP

4KLCPtupnI.tupnikcolcLCEPVLlaitnereffidgnitrevni

-noN

5KLCPntupnI.tupnikcolcLCEPVLlaitnereffidgnitrevnI

6R_DNGrewoP.stupnilaitnereffidrofdnuorgylppusrewoP

M_rewoP.stuptuokcolcFERMrofnipylppusrewoP

9,8

,FERM

FERMn

tuptuO

aotkcolcecnereferasadedivorpskcolcdedneelgn

.slevelecafretniLTTVL/SOMCVL.revirdkcolcyromem

01M_DNGrewoP.stuptuokcolcFERMrofdnuorgylppusrewoP

31V

L_rewoP.sniptupnicigolrofnipylppusrewoP

02,51L_DNGrewoP.sniptupnicigolrofdnuorgylppusrewoP

61T_LEStupnInwodlluP

.stuptuollasetatsirttupnihgihevitcA

.slevelecafretniLTTVL/SOMCVL

710_TLUMtupnInwodlluP

rotcafgniylpitlumeht

stcelessnipowtesehtnognittescigolehT

.stuptuoriapTSOHehtroftnerrucecnereferFERIehtfo

.slevelecafretniLTTVL/SOMCVL

811_TLUMtupnIpulluP

rotcafgniylpitlumehtstcelessnipowtesehtnognittescigolehT

.stuptuoriapTSOHeht

roftnerrucecnereferFERIehtfo

.slevelecafretniLTTVL/SOMCVL

91V

L_rewoP.sniptupnicigolrofnipylppusrewoP

32,22,12

,A_LES

,B_LES

U_LES

tupnInwodlluP

.seicneuqerftuptuoderisedst

celeS

.slevelecafretniLTTVL/SOMCVL

42#NWD_RWPtupnIpulluP

FERMsecroflangisnwod-rewopLTTVLwol-evitcasuonorhcn

ysA

tuptuoP_TSOHsevirddna,stuptuoN_TSOHsetatsirt,wolstuptuo

.slevelecafretniLTTVL/SOMCVL.FERIx2otstnerruc

52V

I_rewoP.tupniecnerefertnerrucFERIrofnipylppusrewoP

62I_DNGrewoP .tupniecnerefertnerrucFERIrofdnuorgylppusre

woP

72FERItupnI

ecnereferasedivorpdnuorgotnipsihtmorfrotsisernoisicerpdexifA

.stuptuokcolcTSOHedom-tnerruc

laitnereffidrofdesutnerruc

64,04,43,82V

H_rewoP .stuptuokcolcTSOHlaitnereffidehtrofsnipylppusrewoP

03,92

,6N_TSOH

6P_TSOH

tuptuO.slevelecafretniLSCH

.sriaptuptuolaitnereffiD

74,34,73,13H_DNGrewoP .stuptuokcolcTSOHlaitnereffidehtrofdnuorgylppusrewoP

33,23

5N_TSOH

5P_TSOH

tuptuO.slevelecafretniLSCH.sriaptuptuolaitnereffiD

63,53

,4N_TSOH

4P_TSOH

tuptuO.slevelecafre

tniLSCH.sriaptuptuolaitnereffiD

93,83

,3N_TSOH

3P_TSOH

tuptuO.slevelecafretniLSCH.sriaptuptuolaitnereffiD

4,14

,2N_TSOH

2P_TSOH

tuptuO.slevelecafretniLSCH.sriaptuptuolaitnereffiD

54,44

,1N_TSOH

1P_TSOH

tuptuO.slevele

cafretniLSCH.sriaptuptuolaitnereffiD

:ETON

pulluP

dna

nwodduP

.seulavlacipytrof,scitsiretcarahCniP,2elbaTeeS.srotsisertupnilanretniotrefer

87158AG www.idt.com REV. C JULY 25, 2010

ICS87158

1-TO-6, LVPECL-TO-HCSL/LVCMOS

÷1, ÷2, ÷4 CLOCK GENERATOR

TABLE 2. PIN CHARACTERISTICS

TABLE 3A. CONTROL INPUT FUNCTION TABLE

stupnIstuptuO

RWP

#NWD_

LES

1P_TSH

1N_TSH

2P_TSH

2N_TSH

3P_TSH

3N_TSH

4P_TSH

4N_TSH

5P_TSH

5N_TSH

P_TSH

6N_TSH

P_FERM

N_FERM

10000 2÷2÷2÷2÷2÷2÷4÷

10001 ZiH2÷2÷2÷2÷ZiH4÷

10010 4÷2÷2÷2÷2÷4÷4÷

10011 4÷4÷4÷4÷4÷4÷4÷

10100 1÷1÷1÷1÷1÷1÷4÷

10101 ZiH1÷1÷1÷1÷ZiH4÷

10110 2÷1÷1÷1÷1÷2÷4÷

10111 2÷2÷2÷2÷2÷2÷2÷

11XXX ZiHZiHZiHZiHZi

HZiHZiH

0XXXX

1P_TSH

FERIx2=

2P_TSH

FERIx2=

3P_TSH

FERIx2=

4P_TSH

FERIx2=

5P_TSH

FERIx2=

6P_TSH

FERIx2=

P_FERM

wol=

1N_TSH

iH=

2N_TSH

ZiH=

3N_TSH

ZiH=

4N_TSH

ZiH=

5N_TSH

ZiH=

6N_TSH

ZiH=

N_FERM

wol=

stupnI snoitarugifnoCeciveD

0_TLUM1_TLUM

tegraTdraoB

ZmreT/ecarT

,RecnerefeR

V=FERI

/)rR*3(

tnerruCtuptuOV

05@ ΩΩ

ΩΩ tnemnorivnE

00 05 Ω

,%1574=rR

Am23.2=FERI

FERI*5=V6.0

01 05 Ω

,%1574=rR

Am23.2=FERI

FERI*6=V7.0

10 05 Ω

,%1574=rR

Am23.2=FERI

FERI*4=V5.0

11 05 Ω

,%1574=rR

Am23.2=FERI

FERI*7=V8.0

TABLE 3B. FUNCTION TABLE

lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU

ecnaticapaCtupnI 4Fp

PULLUP

rotsiseRpulluPtupnI 15kΩ

NWODLLUP

rotsiseRnwodlluPtupnI 15kΩ

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P17

87158AGLFT

Mfr. #:

Buy 87158AGLFT

Manufacturer:

IDT

Description:

Clock Generators & Support Products 6 HCSL 2 CMOS OUT BUFFER/DIV

Lifecycle:

New from this manufacturer.

Delivery:

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Payment:

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87158AGLFT

87158AGLFT

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