PHD63NQ03LT,118 Datasheet PHP63NQ03LT,127, PHD63NQ03LT,118 | P4-P6

Philips Semiconductors

PHP/PHB/PHD63NQ03LT

TrenchMOS™ logic level FET

Product data Rev. 01 — 14 June 2002 4 of 14

9397 750 09822

4. Thermal characteristics

4.1 Transient thermal impedance

Table 3: Thermal characteristics

Symbol Parameter Conditions Min Typ Max Unit

R

th(j-mb)

thermal resistance from junction to mounting base Figure 4 - - 1.35 K/W

R

th(j-a)

thermal resistance from junction to ambient

SOT78 vertical in still air - 60 - K/W

SOT428 SOT428 minimum footprint;

mounted on a PCB

- 75 - K/W

SOT404 and SOT428 SOT404 minimum footprint;

mounted on a PCB

- 50 - K/W

Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration.

03ai83

10

-2

10

-1

1

10

-5

10

-4

10

-3

10

-2

10

-1

t

p

(s)

Z

th(j-mb)

(K/W)

single pulse

δ = 0.5

0.2

0.1

0.05

0.02

t

p

t

p

T

P

t

T

δ =

Philips Semiconductors

PHP/PHB/PHD63NQ03LT

TrenchMOS™ logic level FET

Product data Rev. 01 — 14 June 2002 5 of 14

9397 750 09822

5. Characteristics

Table 4: Characteristics

T

j

=25

°

C unless otherwise speciﬁed

Symbol Parameter Conditions Min Typ Max Unit

Static characteristics

V

(BR)DSS

drain-source breakdown voltage I

D

= 250 µA; V

GS

=0V

T

j

=25°C 30--V

T

j

= −55 °C 27--V

V

GS(th)

gate-source threshold voltage I

D

= 1 mA; V

DS

=V

GS

; Figure 9 V

T

j

=25°C 1 1.9 2.5 V

T

j

= 175 °C 0.6 - - V

T

j

= −55 °C - - 2.9 V

I

DSS

drain-source leakage current V

DS

=30V; V

GS

=0V

T

j

=25°C - 0.05 1 µA

T

j

= 175 °C - - 500 µA

I

GSS

gate-source leakage current V

GS

= ±20 V; V

DS

= 0 V - 10 100 nA

R

DSon

drain-source on-state resistance V

GS

=5V; I

D

=25A;Figure 7 and 8

T

j

=25°C - 15 17.7 mΩ

T

j

= 175 °C - 24 28.3 mΩ

V

GS

= 10 V; I

D

=25A;Figure 7 and 8 - 1113mΩ

Dynamic characteristics

Q

g(tot)

total gate charge I

D

= 50 A; V

DD

=15V; V

GS

=5V;Figure 13 - 9.6 - nC

Q

gs

gate-source charge - 4 - nC

Q

gd

gate-drain (Miller) charge - 3.2 - nC

C

iss

input capacitance V

GS

=0V; V

DS

= 25 V; f = 1 MHz; Figure 11 - 920 - pF

C

oss

output capacitance - 275 - pF

C

rss

reverse transfer capacitance - 110 - pF

t

d(on)

turn-on delay time V

DD

=15V; I

D

= 25 A; V

GS

= 4.5 V; R

G

= 5.6 Ω -12-ns

t

r

rise time - 140 - ns

t

d(off)

turn-off delay time - 10.5 - ns

t

f

fall time -14-ns

Source-drain diode

V

SD

source-drain (diode forward) voltage I

S

= 25 A; V

GS

=0V;Figure 12 - 0.95 1.2 V

t

rr

reverse recovery time I

S

= 10 A; dI

S

/dt = −100 A/µs; V

GS

=0V - 23 - ns

Q

r

recovered charge - 12 - nC

Philips Semiconductors

PHP/PHB/PHD63NQ03LT

TrenchMOS™ logic level FET

Product data Rev. 01 — 14 June 2002 6 of 14

9397 750 09822

T

j

=25°CT

j

=25°C and 175 °C; V

DS

> I

D

xR

DSon

Fig 5. Output characteristics: drain current as a

function of drain-source voltage; typical values.

Fig 6. Transfer characteristics: drain current as a

function of gate-source voltage; typical values.

T

j

=25°C

Fig 7. Drain-source on-state resistance as a function

of drain current; typical values.

Fig 8. Normalized drain-source on-state resistance

factor as a function of junction temperature.

03ai85

0

20

40

60

80

0 0.4 0.8 1.2 1.6

V

DS

(V)

I

D

(A)

5 V

T

j

= 25

°

C

V

GS

= 3 V

10 V

4.5 V

5.5 V

3.5 V

4 V

6 V

03ai87

0

20

40

60

80

0246

V

GS

(V)

I

D

(A)

V

DS

> I

D

x R

DSon

T

j

= 25

°

C

175

°

C

03ai86

0

10

20

30

0 20406080

I

D

(A)

R

DSon

(mΩ)

5 V

V

GS

= 4.5 VT

j

= 25

°

C

5.5V

10 V

6 V

03af18

0

0.5

1

1.5

2

-60 0 60 120 180

T

j

(

°

C)

a

R

DSon

R

DSon 25 C

°

()

-----------------------------

=

PHD63NQ03LT,118

PHD63NQ03LT,118

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