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LTC1606ACSW#TRPBF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16
7
LTC1606
1606fa
V
IN
(Pin 1): Analog Input. Connect through a 200Ω
resistor to the analog input. Full-scale input range is
±10V.
AGND1 (Pin 2): Analog Ground. Tie to analog ground
plane.
REF (Pin 3): 2.5V Reference Output. Bypass with 2.2µF
tantalum capacitor. Can be driven with an external
reference.
CAP (Pin 4): Reference Buffer Output. Bypass with 10µF
tantalum capacitor. The capacitor output voltage is 4.096V
when REF = 2.5V.
AGND2 (Pin 5): Analog Ground. Tie to analog ground
plane.
D15 to D8 (Pins 6 to 13): Three-State Data Outputs.
Hi-Z state when CS is high or when R/C is low.
DGND (Pin 14): Digital Ground.
D7 to D0 (Pins 15 to 22): Three-State Data Outputs.
Hi-Z state when CS is high or when R/C is low.
BYTE (Pin 23): Byte Select. With BYTE low, data will be
output with Pin 6 (D15) being the MSB and Pin 22 (D0)
being the LSB. With BYTE high, the upper eight bits and
the lower eight bits will be switched. The MSB is output
on Pin 15 and bit 8 is output on Pin 22. Bit 7 is output on
Pin 6 and the LSB is output on Pin 13.
R/C (Pin 24): Read/Convert Input. With CS low, a falling
edge on R/C puts the internal sample-and-hold into the
hold state and starts a conversion. With CS low, a rising
edge on R/C enables the output data bits.
CS (Pin 25): Chip Select. Internally OR’d with R/C. With
R/C low, a falling edge on CS will initiate a conversion.
With R/C high, a falling edge on CS will enable the output
data.
BUSY (Pin 26): Output Shows Converter Status. It is low
when a conversion is in progress. Data valid on the rising
edge of BUSY. CS or R/C must be high when BUSY rises
or another conversion will start without time for signal
acquisition.
V
ANA
(Pin 27): 5V Analog Supply. Bypass to ground with
a 0.1µF ceramic and a 10µF tantalum capacitor.
V
DIG
(Pin 28): 5V Digital Supply. Connect directly to
Pin 27.
UU
U
PI FU CTIO S
16-BIT CAPACITIVE DAC
COMP
REF BUF
1.64x
2.5V REF
CAP
(4.096V)
C
SAMPLE
C
SAMPLE
•
•
•
D15
D0
BUSY
CONTROL LOGIC
R/C BYTE
INTERNAL
CLOCK
CS
ZEROING SWITCHES
V
DIG
V
ANA
V
IN
REF
AGND1
AGND2
DGND
16
1606 BD
+
–
SUCCESSIVE APPROXIMATION
REGISTER
OUTPUT LATCHES
4k
7.35k
2.5k9k
UU
W
FU CTIO AL BLOCK DIAGRA
8
LTC1606
1606fa
Conversion Details
The LTC1606 uses a successive approximation algorithm
and an internal sample-and-hold circuit to convert an
analog signal to a 16-bit or two byte parallel output. The
ADC is complete with a precision reference and an internal
clock. The control logic provides easy interface to micro-
processors and DSPs. (Please refer to the Digital Interface
section for the data format.)
Conversion start is controlled by the CS and R/C inputs. At
the start of conversion, the successive approximation
register (SAR) is reset. Once a conversion cycle has
begun, it cannot be restarted.
During the conversion, the internal 16-bit capacitive DAC
output is sequenced by the SAR from the most significant
bit (MSB) to the least significant bit (LSB). Referring to
Figure 1, V
IN
is connected through the resistor divider to
the sample-and-hold capacitor during the acquire phase
and the comparator offset is nulled by the autozero switches.
In this acquire phase, a minimum delay of 1.5µs will
provide enough time for the sample-and-hold capacitor to
acquire the analog signal. During the convert phase, the
autozero switches open, putting the comparator into the
compare mode. The input switch switches C
SAMPLE
to
ground, injecting the analog input charge onto the sum-
ming junction. This input charge is successively com-
pared with the binary-weighted charges supplied by the
capacitive DAC. Bit decisions are made by the high speed
comparator. At the end of a conversion, the DAC output
balances the V
IN
input charge. The SAR contents (a 16-bit
data word) that represents the V
IN
are loaded into the
16-bit output latches.
Driving the Analog Inputs
The nominal input range for the LTC1606 is ±10V or
(±4 • V
REF
) and the input is overvoltage protected to ±25V.
The input impedance is typically 10kΩ, therefore, it should
be driven with a low impedance source. Wideband noise
coupling into the input can be minimized by placing a
1000pF capacitor at the input as shown in Figure 2. An
NPO-type capacitor gives the lowest distortion. Place the
Load Circuit for Access Timing
1k 30pF 30pF
DBN
DBN
1k
5V
1606 TC01
A. Hi-Z TO V
OH
AND V
OL
TO V
OH
B. Hi-Z TO V
OL
AND V
OH
TO V
OL
Load Circuit for Output Float Delay
1k 30pF 30pF
DBN
DBN
1k
5V
1606 TC02
A. V
OH
TO Hi-Z B. V
OL
TO Hi-Z
TEST CIRCUITS
APPLICATIO S I FOR ATIO
WUUU
V
DAC
1606 • F01
+
–
C
DAC
DAC
SAMPLE
HOLD
C
SAMPLE
S
A
R
16-BIT
LATCH
COMPARATOR
SAMPLE
SI
R
IN2
R
IN1
V
IN
Figure 1. LTC1606 Simplified Equivalent Circuit
1606 • F02
1000pF 33.2k LTC1606
V
IN
CAP
A
IN
200Ω
Figure 2. Analog Input Filtering
9
LTC1606
1606fa
capacitor as close to the device input pin as possible. If an
amplifier is to be used to drive the input, care should be
taken to select an amplifier with adequate accuracy, linear-
ity and noise for the application. The following list is a
summary of the op amps that are suitable for driving the
LTC1606. More detailed information is available in the
Linear Technology data books and LinearView
TM
CD-ROM.
LT1007: Low noise precision amplifier. 2.7mA supply
current ± 5V to ±15V supplies. Gain bandwidth product
8MHz. DC applications.
LT1097: Low cost, low power precision amplifier. 300µA
supply current. ±5V to ±15V supplies. Gain bandwidth
product 0.7MHz. DC applications.
LT1227: 140MHz video current feedback amplifier. 10mA
supply current. ±5V to ±15V supplies. Low noise and low
distortion.
LT1360: 37MHz voltage feedback amplifier. 3.8mA supply
current. ±5V to ±15V supplies. Good AC/DC specs.
LT1363: 50MHz voltage feedback amplifier. 6.3mA supply
current. Good AC/DC specs.
LT1364/LT1365: Dual and quad 50MHz voltage feedback
amplifiers. 6.3mA supply current per amplifier. Good AC/
DC specs.
LT1468: 90MHz 22V/µs 16-bit accurate amplifier.
LT1469: Dual LT1468
Internal Voltage Reference
The LTC1606 has an on-chip, temperature compensated,
curvature corrected, bandgap reference, which is factory
trimmed to 2.50V. The full-scale range of the ADC is equal
to (±4 • V
REF
) or nominally ±10V. The output of the
reference is connected to the input of a buffer (1.64x)
through a 4k resistor (see Figure 3). The input to the buffer
or the output of the reference is available at REF (Pin 3).
The internal reference can be overdriven with an external
reference if more accuracy is needed. The buffer output
drives the internal DAC and is available at CAP (Pin 4). The
CAP pin can be used to drive a steady DC load of less than
2mA. Driving an AC load is not recommended because it
can cause the performance of the converter to degrade.
Figure 3. Internal or External Reference Source
–
+
1606 • F03
INTERNAL
CAPACITOR
DAC
BANDGAP
REFERENCE
4k
10µF
CAP
(4.096V)
2.2µF
REF
(2.5V)
4
3
R
0.64R
APPLICATIO S I FOR ATIO
WUUU
For minimum code transition noise, the REF pin and the
CAP pin should each be decoupled with a capacitor to
filter wideband noise from the reference and the buffer
(2.2µF tantalum for the REF pin and 10µF tantalum for the
CAP pin). To prevent the 10µF bypass capacitor from
discharging through the CAP pin if the positive supply
(V
DIG
and V
ANA
) were to drop, a diode (1N4148 or
equivalent) can be placed between the CAP pin and the
positive supply.
Offset and Gain Adjustments
The LTC1606 offset and full-scale errors have been trimmed
at the factory with the external resistors shown in Figure
4. This allows for external adjustment of offset and full
scale in applications where absolute accuracy is impor-
tant. See Figure 5 for the offset and gain trim circuit. The
100k resistor in parallel with the 33.2k is only needed for
externally trimming the offset. First, adjust the offset to
zero by adjusting resistor R3. Apply an input voltage
of –152.6µV (– 0.5LSB) and adjust R3 so the code is
+
5
4
3
2
1
10µF
+
2.2µF
33.2k
1%
±10V INPUT
200Ω
1%
V
IN
AGND1
REF
CAP4.096V
AGND2
LTC1606
1606 • F04
Figure 4. ±10V Input Without Trim
LinearView is a trademark of Linear Technology Corporation
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16

LTC1606ACSW#TRPBF

Mfr. #:
Buy LTC1606ACSW#TRPBF
Manufacturer:
Analog Devices / Linear Technology
Description:
Analog to Digital Converters - ADC 16-B, 250ksps, 1x S ADC
Lifecycle:
New from this manufacturer.
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