ADVANCE INFORMATION Data Sheet No. PD60176-C
IR2172
Block Diagram
Packages
Product Summary
V
OFFSET
600Vmax
I
QBS
1mA
V
in
+/-260mVmax
Gain temp.drift 20ppm/
o
C (typ.)
f
o
40kHz (typ.)
Overcurrent trip 1.5usec (typ)
signal delay
Overcurrent trip level +/-260mV (typ.)
LINEAR CURRENT SENSING IC
16 Lead SOIC
(wide body)
8 Lead PDIP
8 Lead SOIC
VB
V+
V-
VS
VCC
PO
COM
IR2172
GND
15V
To Motor Phase
PWM Output
Up to 600V
OCOvercurrent
Features
Floating channel up to +600V
Monolithic integration
Linear current feedback through shunt resistor
Direct digital PWM output for easy interface
Low I
QBS
allows the boot strap power supply
Independent fast overcurrent trip signal
High common mode noise immunity
Input overvoltage protection for IGBT short circuit
condition
Open Drain outputs
Description
IR2172 is the monolithic current sensing IC designed
for motor drive applications. It senses the motor phase
current through an external shunt resistor, converts from
analog to digital signal, and transfers the signal to the
low side. IR’s proprietary high voltage isolation technol-
ogy is implemented to enable the high bandwidth signal
processing. The output format is discrete PWM to elimi-
nate need for the A/D input interface. The dedicated
overcurrent trip (OC) signal facilitates IGBT short cir-
cuit protection. The OC output pulse can be programmed
by the external resistor and capacitor. The open-drain
outputs make easy for any interface from 3.3V to 15V.
2
IR2172
ADVANCE INFORMATION
www.irf.com
Symbol Definition Min. Max. Units
V
S
High side offset voltage -0.3 600
V
BS
High side floating supply voltage
-0.3 25
V
CC
Low side and logic fixed supply voltage -0.3 25
V
IN
Maximum input voltage between V
IN+ and
V
IN-
-5 5
V
PO
Digital PWM output voltage COM -0.3 VCC +0.3
V
OC
Overcurrent output voltage COM -0.3 VCC +0.3
V
IN-
V
IN-
input voltage (note 1) V
S
-5 V
B+ 0.3
dV/dt Allowable offset voltage slew rate 50 V/ns
P
D
Package power dissipation @ T
A
+25°C 8 lead SOIC .625
8 lead PDIP 1.0
16 lead SOIC 1.25
Rth
JA
Thermal resistance, junction to ambient 8 lead SOIC 200
8 lead PDIP 125
16 lead SOIC 100
T
J
Junction temperature 150
T
S
Storage temperature -55 150
T
L
Lead temperature (soldering, 10 seconds) 300
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage
parameters are absolute voltages referenced to COM, all currents are defined positive into any lead. The thermal
resistance and power dissipation ratings are measured under board mounted and still air conditions.
V
°C/W
Recommended Operating Conditions
The output logic timing diagram is shown in figure 1. For proper operation the device should be used within the recom-
mended conditions.
W
Note 1: Capacitors are required between VB and Vin-, and between VB and Vs pins when bootstrap power
is used. The external power supply, when used, is required between Vs and Vin-, and between VB and Vs
pins.
Symbol Definition Min. Max. Units
V
B
High side floating supply voltage V
S
+13.0 V
S
+20
V
S
High side floating supply offset voltage note 2 600
V
PO
Digital PWM output voltage COM VCC
V
OC
Overcurrent output voltage COM VCC
V
CC
Low side and logic fixed supply voltage 9.5 20
V
IN
Input voltage between V
IN+
and V
IN-
-260 +260 mV
T
A
Ambient temperature -40 125
°C
V
Note 2: Logic operation for Vs of -5 to +600V. Logic state held for Vs of -5V to -VBS.
°C
3
IR2172
ADVANCE INFORMATION
www.irf.com
Symbol Definition Min. Typ. Max. Units Test Conditions
Propagation delay characteristics
fo Carrier frequency output 40 kHz
f
/
T
A
Temperature drift of carrier frequency 500 ppm/
o
C
Dmin Minimum duty 7 %
Dmax Maximum duty 93 % V
IN
+=+260mV,V
IN
-=0V
BW fo bandwidth 15 kHz
PHS Phase shift at 1kHz -10
o
AC Electrical Characteristics
V
CC
= V
BS
= 15V, unless otherwise specified.
V
IN
Nominal input voltage range before saturation -260 260
|V
IN+
_
V
IN-
|
V
OC+
Overcurrent trip positive input voltage
260
V
OC-
Overcurrent trip negative input voltage -260
V
OS
Input offset voltage -10 0 10 V
IN
= 0V (Note 1)
V
OS
/
T
A
Input offset voltage temperature drift 25 µV/
o
C
G Gain (duty cycle % per V
IN
) 157 162 167 %/V max gain error=5%
(Note 2)
G
/
T
A
Gain temperature drift 20 ppm/
o
C
I
LK
Offset supply leakage current 50 µA V
B
= V
S
= 600V
I
QBS
Quiescent V
BS
supply current 1 2 V
S
= 0V
I
QCC
Quiescent V
CC
supply current 1
LIN Linearity (duty cycle deviation from ideal linearity 0.5 1 %
curve)
V
LIN
/
TA
Linearity temperature drift .005 %/
o
C
I
OPO
Digital PWM output sink current 20
2—
I
OCC
OC output sink current 10
1—
DC Electrical Characteristics
V
CC
= V
BS
= 15V, unless otherwise specified.
figure 1
V
IN
= 0 & 5V
V
IN
+=-260mV,V
IN
-=0V
Symbol Definition Min. Typ. Max. Units Test Conditions
Note 1: ±10mV offset represents ±1.5% duty cycle fluctuation
Note 2: Gain = (full range of duty cycle in %) / (full input voltage range).
V
IN
+ = 100mVpk -pk
sine wave, gain=-3dB
V
IN
+ =100mVpk-pk
sine wave
mA
mV
mA
V
O
= 1V
V
O
= 0.1V
V
O
= 1V
V
O
= 0.1V

IR2172

Mfr. #:
Manufacturer:
Infineon Technologies
Description:
IC CURRENT SENSING LINEAR 8-DIP
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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