SI8473EDB-T1-E1

Si8473EDB
www.vishay.com
Vishay Siliconix
S15-1692-Rev. D, 20-Jul-15
7
Document Number: 65037
For technical questions, contact: pmostechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
Normalized Thermal Transient Impedance, Junction-to-Ambient (1" x 1" FR4 Board with Full Copper)
Normalized Thermal Transient Impedance, Junction-to-Ambient (1" x 1" FR4 Board with Minimum Copper)
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?65037
.
10
-3
10
-2
000101110
-1
100
0.2
0.1
0.05
0.02
Square Wave Pulse Duration (s)
Normalized Effective Transient
Thermal Impedance
1
0.1
0.01
Duty Cycle = 0.5
t
1
t
2
Notes:
P
DM
1. Duty Cycle, D =
2. Per Unit Base = R
thJA
= 175 °C/W
3. T
JM
- T
A
=P
DM
Z
thJA
(t)
t
1
t
2
4. Surface Mounted
Single Pulse
Package Information
www.vishay.com
Vishay Siliconix
Revision: 27-Apr-15
1
Document Number: 69378
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
MICRO FOOT
®
: 4-Bumps
(1.6 mm x 1.6 mm, 0.8 mm Pitch, 0.290 mm Bump Height)
Notes
1. Bumps are 95.5/3.8/0.7 Sn/Ag/Cu.
2. Backside surface is coated with a Ti/Ni/Ag layer.
3. Non-solder mask defined copper landing pad.
4. Laser marks on the silicon die back.
5. “b1” is the diameter of the solderable substrate surface, defined by an opening in the solder resist layer solder mask defined.
6. • is the location of pin 1
Note
Use millimeters as the primary measurement.
DIM.
MILLIMETERS INCHES
MIN. NOM. MAX. MIN. NOM. MAX.
A 0.550 0.575 0.600 0.0217 0.0226 0.0236
A1 0.260 0.275 0.290 0.0102 0.0108 0.0114
A2 0.290 0.300 0.310 0.0114 0.0118 0.0122
b 0.370 0.390 0.410 0.0146 0.0153 0.0161
b1 0.300 0.0118
e 0.800 0.0314
s 0.360 0.380 0.400 0.0141 0.0150 0.0157
D 1.520 1.560 1.600 0.0598 0.0614 0.0630
E 1.520 1.560 1.600 0.0598 0.0614 0.0630
K 0.155 0.185 0.215 0.0061 0.0073 0.0085
ECN: T15-0175-Rev. A, 27-Apr-15
DWG: 6038
A2A1
A
4x Ø b1
D
E
S
e
S
SeS
Mark on backside of die
XXXX
G
S
D
D
XXX
Note 5
Recommended land pattern
e
e
4x 0.30 to .31
(Note 3)
Solder mask-0.4
b
K
b1
AN824
Vishay Siliconix
Document Number: 71990
06-Jan-03
www.vishay.com
1
PCB Design and Assembly Guidelines
For MICRO FOOTr Products
Johnson Zhao
INTRODUCTION
Vishay Siliconix’s MICRO FOOT product family is based on a
wafer-level chip-scale packaging (WL-CSP) technology that
implements a solder bump process to eliminate the need for an
outer package to encase the silicon die. MICRO FOOT
products include power MOSFETs, analog switches, and
power ICs.
For battery powered compact devices, this new packaging
technology reduces board space requirements, improves
thermal performance, and mitigates the parasitic effect typical
of leaded packaged products. For example, the 6bump
MICRO FOOT Si8902EDB common drain power MOSFET,
which measures just 1.6 mm x 2.4 mm, achieves the same
performance as TSSOP8 devices in a footprint that is 80%
smaller and with a 50% lower height profile (Figure 1). A
MICRO FOOT analog switch, the 6bump DG3000DB, offers
low charge injection and 1.4 W onresistance in a footprint
measuring just 1.08 mm x 1.58 mm (Figure 2).
Vishay Siliconix MICRO FOOT products can be handled with
the same process techniques used for high-volume assembly
of packaged surface-mount devices. With proper attention to
PCB and stencil design, the device will achieve reliable
performance without underfill. The advantage of the device’s
small footprint and short thermal path make it an ideal option
for space-constrained applications in portable devices such as
battery packs, PDAs, cellular phones, and notebook
computers.
This application note discusses the mechanical design and
reliability of MICRO FOOT, and then provides guidelines for
board layout, the assembly process, and the PCB rework
process.
FIGURE 1. 3D View of MICRO FOOT Products Si8902DB and
Si8900EDB
FIGURE 2. Outline of MICRO FOOT CSP & Analog
Switch DG3000DB
0.18 ~ 0.25
321
A
B
0.5
1.58
0.5
0.285
0.285
1.08

SI8473EDB-T1-E1

Mfr. #:
Manufacturer:
Vishay / Siliconix
Description:
MOSFET 20V 7.1A 2.7W 41mohm @ 4.5V
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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