MAX4613
Quad, SPST Analog Switch
_______________________________________________________________________________________ 7
t
OFF
0.8 x V
OUT
V
OUT
0.8 x V
OUT
t
f
< 20ns
t
r
< 20ns
50%
0V
0V
+3V
SWITCH
OUTPUT
LOGIC INPUT WAVEFORM IS INVERTED FOR SWITCHES
THAT HAVE THE OPPOSITE LOGIC SENSE.
t
ON
LOGIC
INPUT
SWITCH
INPUT
LOGIC
INPUT
+3V
IN_
+5V
V-
-15V
R
L
C
L
V
OUT
S_
GND
C
L
INCLUDES FIXTURE AND STRAY CAPACITANCE.
REPEAT TEST FOR CHANNELS 2, 3, AND 4.
( )
V
OUT
= V
D
R
L
R
L
+ R
DS(ON)
V
L
+15V
V+
D_
MAX4613
Figure 2. Switching Time
50%
V
O1
V
O2
0.9V
O
+3V
0V
V
D
0V
V
D
LOGIC
INPUT
SWITCH
OUTPUT
SWITCH
OUTPUT
+5V
V
L
+15V
V+
S_
V-
-15V
C
L
INCLUDES FIXTURE AND STRAY CAPACITANCE. LOGIC 0 INPUT.
0V
GND
LOGIC
INPUT
V
D
= 10V
V
D
= 10V
0V
0.9V
O
t
D
t
D
IN_
R
L2
S_
C
L2
V
O2
R
L1
V
O1
C
L1
R
L
= 1000Ω
C
L
= 35pF
D_
D_
MAX4613
Figure 3. Break-Before-Make Test Circuit
Timing Diagrams/Test Circuits
____________________Revision History
Pages changed at Rev 3: 1, 9, 10
MAX4613
Quad, SPST Analog Switch
8 _______________________________________________________________________________________
ΔV
OUT
V
OUT
V
IN
Q = ΔV
OUT
× C
L
-15V
V-
V+
IN_GND
S_
+15V
R
GEN
V
GEN
V
IN
= +3V
C
L
V
OUT
V
L
+5V
D_
MAX4613
Figure 4. Charge Injection
_________________________________Timing Diagrams/Test Circuits (continued)
NETWORK
ANALYZER
SIGNAL
GENERATOR
R
GEN
= 50Ω
D_
S_
GND
R
L
10dBm
10nF
V+
+15V
IN_
0 or +2.4V
V-
-15V
10nF
+5V
V
L
MAX4613
Figure 5. Off-Isolation Rejection Ratio
NETWORK
ANALYZER
SIGNAL
GENERATOR
R
GEN
= 50Ω
0 or +2.4V
IN_
D_
GND
R
L
10dBm
10nF
+15V
D_
IN_
S_
0 or +2.4V
50Ω
V-
-15V
10nF
+5V
S_
V
L
V+
MAX4613
Figure 6. Crosstalk
CAPACITANCE
METER
D_
S_
GND
10nF
+15V
IN_
0 or +2.4V
V-
-15V
10nF
f = 1MHz
+5V
V
L
V+
MAX4613
Figure 7. Source/Drain-Off Capacitance
D_
S_
GND
10nF
+15V
IN_
0 or +2.4V
V-
-15V
10nF
V+
+5V
V
L
V
S
MAX4613
CAPACITANCE
METER
f = 1MHz
Figure 8. Source/Drain-On Capacitance
MAX4613
Quad, SPST Analog Switch
_______________________________________________________________________________________ 9
TSSOP4.40mm.EPS
PACKAGE OUTLINE, TSSOP 4.40mm BODY
21-0066
1
1
I
Pin Configurations (continued)
DIP/SO/QSOP/TSSOP
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
IN2
D2
S2
V+
V-
S1
D1
IN1
MAX4613
V
L
S3
D3
IN3
IN4
D4
S4
GND
TOP VIEW
SWITCHES SHOWN FOR LOGIC "0" INPUT
LOGIC SW
2
, SW
3
0
1
ON
OFF
SW
1
, SW
4
OFF
ON
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages
.)

MAX4613EPE

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Analog Switch ICs Quad SPST Analog Switch
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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