MC100EP116MNG

© Semiconductor Components Industries, LLC, 2006
December, 2006 Rev. 11
1 Publication Order Number:
MC10EP116/D
MC10EP116, MC100EP116
3.3 V / 5 VHex Differential
Line Receiver/Driver
Description
The MC10EP116/100EP116 is a 6-bit differential line receiver
based on the EP16 device. The 3.0 GHz bandwidth provided by the
high frequency outputs makes the device ideal for buffering of very
high speed oscillators.
The V
BB
pin, an internally generated voltage supply, is available to
this device only. For singleended input conditions, the unused
differential input is connected to V
BB
as a switching reference voltage.
V
BB
may also rebias AC coupled inputs. When used, decouple V
BB
and V
CC
via a 0.01 mF capacitor and limit current sourcing or sinking
to 0.5 mA. When not used, V
BB
should be left open.
The design incorporates two stages of gain, internal to the device,
making it an excellent choice for use in high bandwidth amplifier
applications.
The differential inputs have internal clamp structures which will
force the Q output of a gate in an open input condition to go to a LOW
state. Thus, inputs of unused gates can be left open and will not affect
the operation of the rest of the device. Note that the input clamp will
take affect only if both inputs fall 2.5 V below V
CC
.
The 100 Series contains temperature compensation.
Features
260 ps Typical Propagation Delay
Maximum Frequency > 3 GHz Typical
PECL Mode Operating Range: V
CC
= 3.0 V to 5.5 V
with V
EE
= 0 V
NECL Mode Operating Range: V
CC
= 0 V
with V
EE
= 3.0 V to 5.5 V
Open Input Default State
Safety Clamp on Inputs
Q Output Will Default LOW with Inputs Open or at V
EE
V
BB
Output
PbFree Packages are Available
LQFP32
FA SUFFIX
CASE 873A
MARKING
DIAGRAM*
*For additional marking information, refer to
Application Note AND8002/D.
http://onsemi.com
MCxxx
EP116
AWLYYWWG
xxx = 10 or 100
A = Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
G or G = PbFree Package
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
ORDERING INFORMATION
QFN32
MN SUFFIX
CASE 488AM
32
1
MCxxx
EP116
AWLYYWWG
G
1
(Note: Microdot may be in either location)
MC10EP116, MC100EP116
http://onsemi.com
2
V
CC
25
26
27
28
29
30
31
32
15
14
13
12
11
10
9
12345678
24 23 22 21 20 19 18 17
16
MC10EP116
MC100EP116
Q2
Q2
V
CC
V
CC
Q3
Q3
V
CC
D1
D1
D2
D2
V
EE
D3
D3
D4
V
EE
Q1Q1Q0Q0V
BB
D0
V
CC
Q4Q4Q5Q5D5D4 D5
Figure 1. 32Lead LQFP Pinout (Top View)
D0
Warning: All V
CC
and V
EE
pins must be externally connected
to Power Supply to guarantee proper operation.
Table 1. PIN DESCRIPTION
PIN
D[0:5]*, D[0:5]
*
Q[0:5], Q[0:5]
ECL Differential Data Outputs
FUNCTION
ECL Differential Data Inputs
V
BB
V
CC
Positive Supply
Reference Voltage Output
V
EE
Negative Supply
Figure 2. 32Lead QFN Pinout (Top View)
Q
0
Q
0
Q
1
Q
1
Q
2
Q
2
Q
3
Q
3
Q
4
Q
4
Q
5
Q
5
D
0
D
0
D
1
D
1
D
2
D
2
D
3
D
3
D
4
D
4
D
5
D
5
* Pins will default LOW when left open.
V
BB
V
EE
Figure 3. Logic Diagram
32
31
30
29
28
27
26
25
9
10
11
12
13
14
15
16
12345678
24 23 22 21 20 19 18 17
Exposed Pad (EP)
V
CC
Q2
Q2
V
CC
V
CC
Q3
Q3
V
CC
D1
D1
D2
D2
V
EE
D3
D3
D4
V
EE
Q1Q1Q0Q0V
BB
D0
V
CC
Q4Q4Q5Q5D5D4 D5
D0
MC10EP116, MC100EP116
http://onsemi.com
3
Table 2. ATTRIBUTES
Characteristics Value
Internal Input Pulldown Resistor
75 kW
Internal Input Pullup Resistor N/A
ESD Protection Human Body Model
Machine Model
Charged Device Model
> 2 kV
> 100 V
> 2 kV
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Pb Pkg PbFree Pkg
LQFP32
QFN32
Level 2
Level 2
Level 1
Flammability Rating Oxygen Index: 28 to 34 UL94 V0 @ 0.125 in
Transistor Count 729 Devices
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.

MC100EP116MNG

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Bus Receivers ECL BUFR FANOUT DIFF
Lifecycle:
New from this manufacturer.
Delivery:
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