1
®
FN8202.1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2004, 2006. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
X9455
Dual Two-wiper Digitally-Controlled
(XDCP™) Potentiometer
The X9455 integrates 2 digitally controlled potentiometers
(XDCP), each one with dual wipers, on a monolithic CMOS
integrated circuit.
The digitally controlled potentiometer is implemented using
255 resistive elements in a series array. Between each
element are tap points connected to wiper terminals through
switches. The position of each wiper on the array is
controlled by the user through the U/D or 2-wire bus
interface. Each potentiometer wiper has associated with it
two volatile Wiper Counter Register (WCR) and each WCR
has associated with it four non-volatile Data Registers that
can be directly written to and read by the user. The contents
of the WCR controls the position of the wiper on the resistor
array though the switches. The contents of the default data
registers (DR0A0, DR0B0, DR1A0, DR1B0) are loaded into
the WCR on power up.
The DCP can be used as a four-terminal potentiometer in a
wide variety of applications including the programming of
bias voltages, window comparators, and three resistor
programmable networks.
Features
• Dual two-wiper solid state potentiometer
• 256 resistor tap points-0.4% resolution
• 2-wire serial interface for write, read, and transfer
operations of the potentiometer
• Up/Down interface for individual potentiometer wipers
• Wiper resistance, 40Ω typical
• Non-volatile storage of wiper positions
• Power on recall loads saved wiper position on power-up.
• Standby current < 20µA Max
• Maximum wiper current: 3mA
•V
CC
: 2.7V to 5.5V operation
•2.8kΩ,10kΩ, 50kΩ, 100kΩ version of total pot resistance
• Endurance: 100,000 data changes per bit per register
• 100 yr. data retention
• 24 Ld TSSOP
• Pb-free plus anneal available (RoHS compliant)
Pinout
X9455
(24 LD TSSOP)
TOP VIEW
RH1NC
RW1A
1
2
3
4
5
6
7
14
20
19
18
17
16
15
X9455
DS0
DS1
A0
RW0B
U/D
NC
SCL
RL1
Vss
NC
RW0A
CS
RH0
RL0
RW1B
NC
Vcc
8
9
10
13
WP
A2
11
12
SDA
A1
24
23
22
21
Data Sheet July 28, 2006
N
O
T
R
E
CO
M
M
E
ND
E
D
F
O
R NE
W
D
E
S
I
G
NS
N
O
RE
C
O
M
M
E
N
D
E
D
R
E
P
L
A
C
E
M
E
N
T
c
o
n
t
a
c
t
o
u
r
T
e
c
h
n
i
c
a
l
S
u
p
p
o
r
t
C
e
n
t
e
r
a
t
1
-
8
8
8
-
INT
E
R
S
I
L
o
r
w
w
w
.
i
n
t
e
r
s
il
.
c
o
m
/
t
s
c
