6. I/O Multiplexing
Each pin is by default controlled by the PORT as a general purpose I/O and alternatively it can be
assigned to one of the peripheral functions.
The following table describes the peripheral signals multiplexed to the PORT I/O pins.
Table 6-1. PORT Function Multiplexing
No. PAD EXTINT PCINT ADC/AC PTC X PTC Y OSC T/C # 0 T/C # 1 USART I2C SPI JTAG
1 PB[5] PCINT13 Y29 ICP3 MOSI0
2 PB[6] PCINT14 Y30 OC3A MISO0
3 PB[7] PCINT15 Y31 OC3B OC4B SCK0
4 RESET
5 VCC
6 GND
7 PE[0] PCINT32 XTAL2
8 PE[1] PCINT33 XTAL1
9 PD[0] PCINT24 X0 Y8 T3 RxD0
10 PD[1] PCINT25 X1 Y9 TxD0
11 PD[2] INT0 PCINT26 X2 Y10 RxD1
12 PD[3] INT1 PCINT27 X3 Y11 TXD1
13 PD[4] PCINT28 X4 Y12 OC1B XCK1
14 PD[5] PCINT29 X5 Y13 OC1A
15 PD[6] PCINT30 X6 Y14 OC2B ICP1 SS1
16 PD[7] PCINT31 X7 Y15 OC2A XCK2 SCK1
17 PE[2] X8 Y16 RxD2 MISO1
18 PE[3] X9 Y17 TxD2 MOSI1
19 PC[0] PCINT16 X10 Y18 SCL0
20 PC[1] PCINT17 X11 Y19 SDA0
21 PC[2] PCINT18 X12 Y20 T4 TCK
22 PC[3] PCINT19 X13 Y21 ICP4 TMS
23 PC[4] PCINT20 X14 Y22 OC4A TDO
24 PC[5] PCINT21 ACO X15 Y23 TDI
25 PC[6] PCINT22 TOSC1
26 PC[7] PCINT23 TOSC2
27 AVCC
28 GND
29 PE[4] AREF
30 PA[7] PCINT7 ADC7 Y7
31 PA[6] PCINT6 ADC6 Y6
32 PA[5] PCINT5 ADC5 Y5
33 PA[4] PCINT4 ADC4 Y4
34 PA[3] PCINT3 ADC3 Y3
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No. PAD EXTINT PCINT ADC/AC PTC X PTC Y OSC T/C # 0 T/C # 1 USART I2C SPI JTAG
35 PA[2] PCINT2 ADC2 Y2
36 PA[1] PCINT1 ADC1 Y1
37 PA[0] PCINT0 ADC0 Y0
38 PE[5] SDA1
39 PE[6] SCL1
40 PB[0] PCINT8 Y24 T0 XCK0
41 PB[1] PCINT9 Y25 CLKO T1
42 PB[2] INT2 PCINT10 AIN0 Y26
43 PB[3] PCINT11 AIN1 Y27 OC0A
44 PB[4] PCINT12 Y28 OC0B SS0
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7. General Information
7.1. Resources
A comprehensive set of development tools, application notes, and datasheets are available for download
on http://www.atmel.com/avr.
7.2. Data Retention
Reliability Qualification results show that the projected data retention failure rate is much less than 1 PPM
over 20 years at 85°C.
7.3. About Code Examples
This documentation contains simple code examples that briefly show how to use various parts of the
device. These code examples assume that the part specific header file is included before compilation. Be
aware that not all C compiler vendors include bit definitions in the header files and interrupt handling in C
is compiler dependent. Confirm with the C compiler documentation for more details.
For I/O Registers located in extended I/O map, “IN”, “OUT”, “SBIS”, “SBIC”, “CBI”, and “SBI” instructions
must be replaced with instructions that allow access to extended I/O. Typically “LDS” and “STS”
combined with “SBRS”, “SBRC”, “SBR”, and “CBR”.
7.4. Capacitive Touch Sensing
7.4.1. QTouch Library
The Atmel
®
QTouch
®
Library provides a simple to use solution to realize touch sensitive interfaces on
most Atmel AVR
®
microcontrollers. The QTouch Library includes support for the Atmel QTouch and Atmel
QMatrix
®
acquisition methods.
Touch sensing can be added to any application by linking the appropriate Atmel QTouch Library for the
AVR Microcontroller. This is done by using a simple set of APIs to define the touch channels and sensors,
and then calling the touch sensing API’s to retrieve the channel information and determine the touch
sensor states.
The QTouch Library is FREE and downloadable from the Atmel website at the following location: http://
www.atmel.com/technologies/touch/. For implementation details and other information, refer to the Atmel
QTouch Library User Guide - also available for download from the Atmel website.
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ATMEGA324PB-MN

Mfr. #:
Manufacturer:
Microchip Technology / Atmel
Description:
8-bit Microcontrollers - MCU 20MHZ, QFN/MFL, Extended TEMP, GREEN 5 V
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