MPC9448 Rev 7 3/15/16 7 ©2016 INTEGRATED DEVICE TECHNOLOGY, INC.
MPC9448 DATASHEET
Since this step is well above the threshold region, it will not
cause any false clock triggering; however, designers may be
uncomfortable with unwanted reflections on the line. To better
match the impedances when driving multiple lines, the
situation in Figure 6 should be used. In this case, the series
terminating resistors are reduced such that when the parallel
combination is added to the output buffer impedance, the line
impedance is perfectly matched.
Figure 6. Optimized Dual Line Termination
Power Consumption of the MPC9448 and
Thermal Management
The MPC9448 AC specification is guaranteed for the
entire operating frequency range up to 350 MHz. The
MPC9448 power consumption, and the associated long-term
reliability, may decrease the maximum frequency limit,
depending on operating conditions such as clock frequency,
supply voltage, output loading, ambient temperature, vertical
convection and thermal conductivity of package and board.
This section describes the impact of these parameters on the
junction temperature and gives a guideline to estimate the
MPC9448 die junction temperature and the associated
device reliability. For a complete analysis of power
consumption as a function of operating conditions and
associated long term device reliability, please refer to the
Freescale application note AN1545. According the AN1545,
the long-term device reliability is a function of the die junction
temperature:
Increased power consumption will increase the die
junction temperature and impact the device reliability
(MTBF). According to the system-defined tolerable MTBF,
the die junction temperature of the MPC9448 needs to be
controlled, and the thermal impedance of the board/package
should be optimized. The power dissipated in the MPC9448
is represented in equation 1.
Where I
CCQ
is the static current consumption of the
MPC9448, C
PD
is the power dissipation capacitance per
output.
C
L
represents the external capacitive output
load, and N is the number of active outputs (N is always 12 in
case of the MPC9448). The MPC9448 supports driving
transmission lines to maintain high signal integrity and tight
timing parameters. Any transmission line will hide the lumped
capacitive load at the end of the board trace, therefore,
C
L
is zero for controlled transmission line systems and can be
eliminated from equation 1. Using parallel termination output,
termination results in equation 2 for power dissipation.
In equation 2, P stands for the number of outputs with a
parallel or thevenin termination. V
OL
, I
OL
, V
OH
and I
OH
are a
function of the output termination technique, and DC
Q
is the
clock signal duty cycle. If transmission lines are used,
C
L
is
zero in equation 2 and can be eliminated. In general, the use
of controlled transmission line techniques eliminates the
impact of the lumped capacitive loads at the end lines and
greatly reduces the power dissipation of the device.
Equation 3 describes the die junction temperature T
J
as a
function of the power consumption.
Where R
thja
is the thermal impedance of the package
(junction to ambient), and T
A
is the ambient temperature.
According to Figure 9, the junction temperature can be used
to estimate the long-term device reliability. Further, combining
equation 1 and equation 2 results in a maximum operating
frequency for the MPC9448 in a series terminated
transmission line system, equation 4.
17
MPC9448
Output
Buffer
R
S
= 16
Z
O
= 50
R
S
= 16
Z
O
= 50
17+ 16 || 16 = 50 || 50
25 = 25
Table 9. Die Junction Temperature and MTFB
Junction Temperature (C) MTBF (Years)
100 20.4
110 9.1
120 4.2
130 2.0
P
TOT
= [ I
CCQ
+ V
CC
· f
CLOCK
· ( N · C
PD
+ C
L
) ] · V
CC
M
P
TOT
= V
CC
· [ I
CCQ
+ V
CC
· f
CLOCK
· ( N · C
PD
+ C
L
) ] + [ DC
Q
· I
OH
· (V
CC
– V
OH
) + (1 – DC
Q
) · I
OL
· V
OL
]
M
P
T
J
= T
A
+ P
TOT
· R
thja
Equation 1
Equation 2
Equation 3
Equation 4
f
CLOCK,MAX =
C
PD
· N · V
2
CC
1
· [
– (I
CCQ
· V
CC
) ]
R
thja
T
j,MAX
– T
A
